Abstract: A disk drive data storage system comprising at least one data storage disk and a sensor assembly proximate the data storage disk. The sensor assembly further comprises circuitry for writing data to the data storage disk and circuitry for reading data from the data storage disk. The system also comprises circuitry for controlling the circuitry for reading data during different time periods so that the circuitry for reading data consumes different levels of power while the circuitry for writing data is writing data to the data storage disk.

Abstract: A disk drive data storage system. The system comprises a data storage disk, a movable member positioned near the data storage disk, and a sensor assembly, supported and movable by the movable member, for writing data to and reading data from the data storage disk. The system also comprises an integrated circuit that is electrically coupled to the sensor assembly and that moves with the movable member when the movable member moves the sensor assembly. The integrated circuit comprises a face and a backside, and the integrated circuit is in a fixed physical position relative to the movable member such that the backside is oriented toward the movable member.

Abstract: A disk drive data storage system comprising at least one data storage disk and a sensor assembly proximate the data storage disk. The sensor assembly further comprises circuitry for writing data to the data storage disk and circuitry for reading data from the data storage disk. The system also comprises circuitry for controlling the circuitry for reading data during different time periods so that the circuitry for reading data consumes different levels of power while the circuitry for writing data is writing data to the data storage disk.

Abstract: A disk drive data storage system. The system comprises a data storage disk, a movable member positioned near the data storage disk, and a sensor assembly, supported and movable by the movable member, for writing data to and reading data from the data storage disk. The system also comprises an integrated circuit that is electrically coupled to the sensor assembly and that moves with the movable member when the movable member moves the sensor assembly. The integrated circuit comprises a face and a backside, and the integrated circuit is in a fixed physical position relative to the movable member such that the backside is oriented toward the movable member.

Abstract: A start up circuit includes: a diode Q0; a first transistor Q1 coupled in series with the diode Q0; a first resistor R4 coupled in series with the first transistor Q1; a second transistor Q2 having a control node coupled to a control node of the first transistor Q1 and coupled to a node between the first transistor Q1 and the first resistor R4; and a second resistor R2 coupled in series with the second transistor Q2 such that a current in the second transistor Q2 is independent of a voltage applied across the diode Q0, the first transistor Q1, and the first resistor R4.

Abstract: The amplifier output stage circuit includes: a translinear loop 30 having first and second input nodes Vin+ and Vin−; a first transistor Q7 coupled between a first output node of the translinear loop 30 and a first supply node V+; a first output transistor Q9 coupled between an output node 36 of the circuit and the first supply node V+, and having a base coupled to a base of the first transistor Q7; a second transistor Q10 coupled between a second output node of the translinear loop 30 and a second supply node V−; a second output transistor Q12 coupled between the output node 36 of the circuit and the second supply node V−, and having a base coupled to a base of the second transistor Q10.

Abstract: An operational amplifier input stage includes a first differential input transistor and a second differential input transistor receiving a differential input voltage. A first translinear loop is coupled to the first differential input transistor and a second translinear loop is coupled to the second differential input transistor. The first and second translinear loops are operable to supply an instantaneous current to the respective first and second differential input transistors to sufficiently charge capacitances therein during slewing conditions.

Abstract: The improved Class AB input stage monitors the needs of base current in the slewing transistors 22-25 and supplies that base current with extremely fast and precise feedback loops 90-93. This allows the input stage quiescent current to be very small and gets rid of the non-linearities associated with the lack of base current available to drive the slewing transistors 22-25 in a conventional prior art Class AB input stage. The input stage is a very efficient, low distortion, high small signals and full power bandwidth Class AB input stage.

Abstract: A system for driving a signal is provided that includes a biasing circuit operable to receive an input signal and operable to produce a bias signal based on the input signal. A drive circuit includes a sensor circuit including a transistor coupled to a first power supply. The drive circuit is coupled to the biasing circuit. The drive circuit is operable to receive the bias signal and to produce an amplified signal based on the bias signal. An output circuit includes a transistor coupled to a second power supply. The output circuit is coupled to the drive circuit. The output circuit is operable to receive the amplified signal and to produce an output signal based on the amplified signal.

Abstract: The improved Class AB input stage monitors the needs of base current in the slewing transistors 22-25 and supplies that base current with extremely fast and precise feedback loops 90-93. This allows the input stage quiescent current to be very small and gets rid of the non-linearities associated with the lack of base current available to drive the slewing transistors 22-25 in a conventional prior art Class AB input stage. The input stage is a very efficient, low distortion, high small signals and full power bandwidth Class AB input stage.

Abstract: A system for driving a signal is provided that includes a biasing circuit operable to receive an input signal and operable to produce a bias signal based on the input signal. A drive circuit includes a sensor circuit including a transistor coupled to a first power supply. The drive circuit is coupled to the biasing circuit. The drive circuit is operable to receive the bias signal and to produce an amplified signal based on the bias signal. An output circuit includes a transistor coupled to a second power supply. The output circuit is coupled to the drive circuit. The output circuit is operable to receive the amplified signal and to produce an output signal based on the amplified signal.

Abstract: The amplifier output stage circuit includes: a translinear loop 30 having first and second input nodes Vin+ and Vin−; a first transistor Q7 coupled between a first output node of the translinear loop 30 and a first supply node V+; a first output transistor Q9 coupled between an output node 36 of the circuit and the first supply node V+, and having a base coupled to a base of the first transistor Q7; a second transistor Q10 coupled between a second output node of the translinear loop 30 and a second supply node V−; a second output transistor Q12 coupled between the output node 36 of the circuit and the second supply node V−, and having a base coupled to a base of the second transistor Q10.

Abstract: An output stage (10) is provided having transistors of the same polarity type, which function to amplify the input signal at a wide range of frequencies, with low power consumption and low crossover distortion. By biasing the output transistors to remain on during both the positive and negative voltage swing of the input signal, low power consumption as well as low output crossover distortion is achieved. A high efficiency, low crossover distortion, current amplifier circuit for amplifying an input signal (VIN) in accordance with this present invention includes an output driver (12), a current source (IS1) and a translinear loop circuit (14). The output driver (12) includes a sourcing circuit (Q6). The current source (IS1), connected to the output driver (12), provides bias current to the sourcing circuit. The translinear loop circuit (14), connected to the output driver (12), receives the input signal (VIN).

Abstract: A Class AB amplifier (10) having a top booster section (14) and a bottom booster section (12) adapted to prevent crossover distortion, latchup, and provides high output voltage swing output. The amplifier 10 has a positive feedback loop including a current mirror comprising transistors (M1, M2) that get activated during extreme sourcing conditions. The feedback loop provides the necessary biasing current to a biasing transistor (Q9) of an output sinking transistor (Q11) to allow high output sourcing current and high sinking current to prevent crossover distortion and latching. The output transistors (Q8, Q9, Q10 and Q11) of the amplifier (10) are all NPN-type transistors.

Abstract: A start up circuit includes: a diode Q0; a first transistor Q1 coupled in series with the diode Q0; a first resistor R4 coupled in series with the first transistor Q1; a second transistor Q2 having a control node coupled to a control node of the first transistor Q1 and coupled to a node between the first transistor Q1 and the first resistor R4; and a second resistor R2 coupled in series with the second transistor Q2 such that a current in the second transistor Q2 is independent of a voltage applied across the diode Q0, the first transistor Q1, and the first resistor R4.

Abstract: An operational amplifier input stage includes a first differential input transistor and a second differential input transistor receiving a differential input voltage. A first translinear loop is coupled to the first differential input transistor and a second translinear loop is coupled to the second differential input transistor. The first and second translinear loops are operable to supply an instantaneous current to the respective first and second differential input transistors to sufficiently charge capacitances therein during slewing conditions.

Abstract: An operational amplifier input stage includes a first differential input transistor and a second differential input transistor receiving a differential input voltage. A first translinear loop is coupled to the first differential input transistor and a second translinear loop is coupled to the second differential input transistor. The first and second translinear loops are operable to supply an instantaneous current to the respective first and second differential input transistors to sufficiently charge capacitances therein during slewing conditions.

Abstract: Responsive to an external load, an output stage (201) of an amplifier (200) in accordance with the present invention provides a current boosting scheme capable of generating a large output current while maintaining a low quiescent current. The output stage (201) includes a sink control circuit (204) coupled to the input terminal (202) for receiving the output of the input amplifier stage. A translinear loop circuit (210) is coupled to the sink control circuit (204), for receiving the sink pass-through current and for producing a source pass-through current. A current mirror circuit (222) is coupled to the translinear loop circuit (210) for receiving the source pass-through and for producing a bias current output therefrom. An output driver (230) is coupled to the current mirror circuit (222) and the sink control circuit (204), wherein the output driver (230) receives the bias output current and the sink pass-though current to provide an output current.

Abstract: A single pair differential amplifier circuit (90) provides signal amplification across the full amplifier power-supply voltage range. The differential amplifier circuit (90) is coupled to the first rail (122) and the second rail (124) and has a differential input (114 and 116) for receiving a common-mode input voltage. A bias circuit (126) is coupled to the differential amplifier circuit (90) for applying a bias voltage to the differential pair of transistors (102 and 104) such that the bias circuit (126) controls the threshold voltage of the differential pair of transistors (102 and 104) in the response to the common-mode input voltage. The bias circuit (126) turns differential pair of transistors (102 and 104) on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage.