Patents by Inventor Priya N. Vaidya

Priya N. Vaidya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9766672
    Abstract: In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
    Type: Grant
    Filed: March 19, 2013
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Bryan C. Morgan, Priya N. Vaidya, Premanand Sakarda, Marlon A. Moncrieffe
  • Publication number: 20160378551
    Abstract: Systems and methods may provide for making a power efficiency determination at runtime based on one or more runtime usage notifications and scheduling a workload for execution on a hardware accelerator if the power efficiency determination indicates that execution of the workload on the hardware accelerator will be more efficient than execution of the workload on a host processor. Additionally, the workload may be scheduled for execution on the host processor if the power efficiency determination indicates that execution of the workload on the host processor will be more efficient than execution of the workload on the hardware accelerator. In one example, making the power efficiency determination includes applying one or more configurable rules to at least one of the one or more runtime usage notifications.
    Type: Application
    Filed: June 24, 2015
    Publication date: December 29, 2016
    Applicant: Intel Corporation
    Inventors: Priya N. Vaidya, Premanand Sakarda
  • Publication number: 20140108830
    Abstract: In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
    Type: Application
    Filed: March 19, 2013
    Publication date: April 17, 2014
    Inventors: Bryan C. Morgan, Priya N. Vaidya, Premanand Sakarda, Marlon A. Moncrieffe
  • Patent number: 8402293
    Abstract: In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: March 19, 2013
    Assignee: Intel Corporation
    Inventors: Bryan C. Morgan, Priya N. Vaidya, Premanand Sakarda, Marlon A. Moncrieffe
  • Publication number: 20120166844
    Abstract: In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
    Type: Application
    Filed: June 28, 2011
    Publication date: June 28, 2012
    Inventors: BRYAN C. MORGAN, PRIYA N. VAIDYA, PREMANAND SAKARDA, MARLON A. MONCRIEFFE
  • Patent number: 7971084
    Abstract: In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: June 28, 2011
    Assignee: Intel Corporation
    Inventors: Bryan C. Morgan, Priya N. Vaidya, Premanand Sakarda, Marlon A. Moncrieffe
  • Patent number: 7814485
    Abstract: A processing system may include a performance monitoring unit (PMU), a machine accessible medium, and a processor responsive to the PMU and the machine accessible medium. Instructions encoded in the machine accessible medium, when executed by the processor, may determine whether performance details for the processing system should be collected, based at least in part on a predetermined monitoring policy for the processing system. The instructions may generate performance data for the processing system, based at least in part on data obtained from the PMU. The instructions may determine whether the processing system should be reconfigured, based at least in part on the performance data and a power policy profile for the processing system. The instructions may automatically adjust power consumption of the processing system by using the PMU to reconfigure the processing system. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: October 12, 2010
    Assignee: Intel Corporation
    Inventors: Bryan C Morgan, Premanand Sakarda, Priya N Vaidya, Yi Ge, Zhou Gao, Swee-chin Pang, Manoj I Thadani, Canhui Yuan
  • Publication number: 20090172432
    Abstract: In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Inventors: Bryan C. Morgan, Priya N. Vaidya, Premanand Sakarda, Marlon A. Moncrieffe
  • Patent number: 7346787
    Abstract: A disclosed method involves initializing a performance profiler of a processing system. The performance profiler may include performance profile parameters for a power management policy for the processing system. The method also involves retrieving performance metrics for the processing system from a performance monitoring unit (PMU) of the processing system, in response to a determination that performance details should be collected. A current performance state of the processing system may be determined, based at least in part on the performance profile parameters and the performance metrics from the PMU. The current performance state may then be communicated to a policy manager of the processing system. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: March 18, 2008
    Assignee: Intel Corporation
    Inventors: Priya N Vaidya, Premanand Sakarda, Bryan C Morgan, Yi Ge
  • Patent number: 7266646
    Abstract: A dynamic cache-locking algorithm may determine the most frequently used function(s) and the number of cache lines that should be locked into the instruction cache embedded into a processor. By evaluating the dynamic cache-locking algorithm, a determination may be made to lock an optimal amount of functions that correspond to a given, limited amount of instruction cache.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: September 4, 2007
    Assignee: Marvell International Ltd.
    Inventors: Priya N. Vaidya, Moinul H. Khan
  • Patent number: 7159096
    Abstract: A method and apparatus to perform memory management are described.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: January 2, 2007
    Assignee: Marvell International Ltd.
    Inventors: Moinul H. Khan, Priya N. Vaidya
  • Publication number: 20030236810
    Abstract: A multiplication apparatus and system may include a multiplicand buffer to hold a digit of a multiplicand, a multiplier buffer to hold a digit of a multiplier, and a result buffer to hold a carry-free multiplied and accumulated result of the multiplicand and a plurality of reverse ordered digits included in the multiplier. An article, including a machine-accessible medium, may contain data capable of causing a machine to implement a multiplication method, including selecting a multiplicand plurality of digits, reversing the order of a selected multiplier plurality of digits to provide a reversed plurality of digits, and multiplying and accumulating the multiplicand plurality of digits and the reversed plurality of digits to provide a multiplication result.
    Type: Application
    Filed: June 25, 2002
    Publication date: December 25, 2003
    Applicant: Intel Corporation
    Inventors: Priya N. Vaidya, Minda Zhang
  • Publication number: 20030059089
    Abstract: A row-wise technique may be utilized for determining a fractional matching block in a motion estimation vector algorithm. By interpolating and calculating a sum of absolute differences on a row-wise basis, a more efficient algorithm may be implemented. On a row-by-row basis, the corresponding interpolated values are updated and those values, once updated, may be compared to determine the best match among the potential fractional matching blocks. As a result, a fractional matching block may be identified to determine the motion vector to a greater degree of accuracy.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 27, 2003
    Inventors: James E. Quinlan, Priya N. Vaidya, Nigel Paver