Patents by Inventor Priyavadan Patel

Priyavadan Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060264021
    Abstract: An apparatus, method, and system for integrated circuit packaging having an offset solder bump are disclosed herein. A semiconductor substrate has a bond pad and a passivation layer located on an active surface thereof. A solder terminal contacts both the bond pad and passivation layer. A solder bump contacts the solder terminal and is positioned laterally offset from the bond pad.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 23, 2006
    Inventors: Mohammad Farahani, Priyavadan Patel, Sriram Muthukumar
  • Publication number: 20050093120
    Abstract: An integrated circuit (IC) package that includes an on-package voltage regulation module (VRM). An IC die is flip-bounded to a substrate having a plurality of connections to couple to a socket or to be mounted directly to a circuit board. An integrated heat spreader (IHS) is thermally coupled to the IC die and coupled (both electrically and mechanically) to the substrate. A VRM is coupled to the IHS. The IHS, which serves as an interconnect member, includes interconnect provisions for electrically coupling the VRM to the substrate. In one embodiment, the body of the IHS serves as a ground plane, while a separate interconnect layer includes electrical traces for routing electrical signals between the VRM and substrate. The VRM may comprise a detachable package that is coupled to the IHS via one of several means including fasteners, edge connectors and a parallel coupler.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 5, 2005
    Inventors: Debendra Millik, Priyavadan Patel