Abstract: A phase modulator faithfully reproduces higher frequency modulation using an offset phase-locked loop (OPLL) without passing excessive noise through an increased bandwidth of the OPLL. A quadrature modulator modulates information from a baseband signal onto a passband IF signal and, after a limiter strips away amplitude variations, the OPLL reproduces the phase modulation on an RF signal. The OPLL introduces a group delay that does not vary linearly with the modulation frequency and that consequently causes distortion when uncompensated. A baseband filter filters the amplitude of the baseband signal and introduces a complementary group delay that compensates for the OPLL group delay and results in a combined group delay of the baseband filter, quadrature modulator, limiter and OPLL that remains substantially constant as modulation frequency varies. Compensating for the OPLL group delay reduces distortion and the spectral energy at offset frequencies from the carrier frequency of the RF signal.

Abstract: A wireless transceiver includes a transmitter having a harmonic rejection mixer and an RF output phase-locked loop in a two step up-conversion architecture, and a direct conversion receiver. The transmitter includes a local oscillator for producing a signal at a multiple of an intermediate frequency, a quadrature modulator harmonic rejection mixer responsive to the signal at the multiple of the intermediate frequency for modulating in-phase and quadrature-phase base-band signals to produce an intermediate frequency signal, a filter responsive to the intermediate frequency signal for producing a filtered intermediate frequency signal, and an RF output offset phase-locked loop responsive to the filtered intermediate frequency signal and the signal at the multiple of the intermediate frequency for producing an RF transmission signal. The harmonic rejection mixer reduces filtering requirements to facilitate a high level of circuit integration.

Abstract: A transmitter 108 converts a digital baseband signal input 150 for transmission by an antenna 114 to support multiple communication standards. An over-deviation phase multiplier 130 increases signal phase deviation by a factor of M. A digital phase modulator 176 applies trigonometric lookup tables. A digital intermediate frequency up-converter 132 up-shifts frequencies of desired signal content. First and second digital-to-analog converters (DACs) 134 and 136 use relatively low-bit operations, which add DAC noise 212. First and second low pass filters 138 and 140 apply rejection above frequencies of desired signal content. An analog I/Q modulator 142 converts from complex to real signals, adding an unwanted signal spaced from the desired signal content by an intermediate frequency multiple. A limiter 144 reduces amplitude modulated noise. An over-deviation phase divider 146 divides signal phase deviation by 1/M to reduce phase modulated noise.

Abstract: A wireless transceiver includes a transmitter having a harmonic rejection mixer and an RF output phase-locked loop in a two step up-conversion architecture, and a direct conversion receiver. The transmitter includes a local oscillator for producing a signal at a multiple of an intermediate frequency, a quadrature modulator harmonic rejection mixer responsive to the signal at the multiple of the intermediate frequency for modulating in-phase and quadrature-phase base-band signals to produce an intermediate frequency signal, a filter responsive to the intermediate frequency signal for producing a filtered intermediate frequency signal, and an RF output offset phase-locked loop responsive to the filtered intermediate frequency signal and the signal at the multiple of the intermediate frequency for producing an RF transmission signal. The harmonic rejection mixer reduces filtering requirements to facilitate a high level of circuit integration.

Abstract: A transmitter 108 converts a digital baseband signal input 150 for transmission by an antenna 114 to support multiple communication standards. An over-deviation phase multiplier 130 increases signal phase deviation by a factor of M. A digital phase modulator 176 applies trigonometric lookup tables. A digital intermediate frequency up-converter 132 up-shifts frequencies of desired signal content. First and second digital-to-analog converters (DACs) 134 and 136 use relatively low-bit operations, which add DAC noise 212. First and second low pass filters 138 and 140 apply rejection above frequencies of desired signal content. An analog I/Q modulator 142 converts from complex to real signals, adding an unwanted signal spaced from the desired signal content by an intermediate frequency multiple. A limiter 144 reduces amplitude modulated noise. An over-deviation phase divider 146 divides signal phase deviation by 1/M to reduce phase modulated noise.