Patents by Inventor Puducode S. Narayanan

Puducode S. Narayanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6014717
    Abstract: A PCMCIA host adapter includes the capability to master a non-DMA system bus and control a DMA data transfer between a DMA capable peripheral and the internal system memory. A peripheral can be coupled to the system through a PCMCIA card plugged into a PCMCIA expansion slot. A DMA controller coupled to the PCMCIA expansion slots through a PCMCIA bus controls a DMA transfer between the internal system memory and the peripheral. A bus master disables the CPU and takes control of the system bus during a DMA data transfer. In an alternative embodiment, the PCMCIA host adapter can be used with either a system having a system bus with DMA capability or with a system having a system bus without DMA capability. In this alternate embodiment if the system bus has DMA capability, the PCMCIA host adapter effectively passes the DMA signals between the peripheral and the system bus.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: January 11, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: Daniel G. Bezzant, Stephen A. Smith, Narasimha R. Nookala, Puducode S. Narayanan, Ashutosh S. Dikshit
  • Patent number: 5594874
    Abstract: An integrated automatic bus setting, sensing and switching interface unit is manufactured on board an integrated circuit to interface between the integrated circuit and the system bus. The interface unit can support a plurality of bus structures utilizing the same pins on the integrated circuit for different functions. Several modes of establishing an interface structure are available in the unit. An Address Strobe pin on the integrated circuit is used to automatically detect a signal level representative of the bus structure to be used. A code representative of the parameters of the bus structure is also stored in a configuration register for controlling the interface unit and configuring the pins on the integrated circuit for the specific bus structure to be used. The Basic Input Output System (BIOS) as its first operation stores the code in a register whose contents are then written to the configuration register of the integrated circuit for controlling and configuring the integrated circuit.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: January 14, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: Puducode S. Narayanan, Tai T. Nguyen, Arunachalam Vaidyanathan, Edward C. Garcia