Patents by Inventor Pui Sze LAU

Pui Sze LAU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240059853
    Abstract: An oxygen barrier packaging material is provided. The packaging film includes a substrate polymer formed as a transparent and flexible film. An at least 75 percent light transmissive, oxygen barrier coating is formed on the substrate polymer transparent and flexible film. The oxygen barrier coating is formed from a composition that includes approximately 15 wt % to 35 wt % of a coating polymer in dry weight, approximately 0.1 wt % to 5 wt % of nanoparticles in dry weight, approximately 40 wt % to 75 wt % of a plasticizer in dry weight, and approximately 5 wt % to 20 wt % of a crosslinking agent in dry weight. The nanoparticles in the coating create a convoluted path for oxygen and the coating is stretchable and bendable with the substrate polymer.
    Type: Application
    Filed: August 14, 2023
    Publication date: February 22, 2024
    Inventors: Yan Yan LAM, Pui Sze LAU, Kwan Shing CHAN, Ka Yee HO
  • Patent number: 10593788
    Abstract: The present invention relates to a power semiconductor device structure and a fabrication process, and provides a high-performance RC-IGBT structure that can be fabricated without a thin wafer process. To achieve this objective, the present invention provides an RC-IGBT structure, including: an emitter electrode at the front surface; a plurality of cells under the emitter electrode; an n? drift region under the cells; a collector electrode located at the back surface; a plurality of trenches located at the back surface and being filled by the collector electrode; a mechanical support semiconductor region located between the trenches; a p+ collector region located at the top of each trench and connected to the collector electrode; an n buffer region located on top of each p+ collector region and below the n? drift region; and an n+ cathode region at the sidewall of each trench and connected to the collector electrode.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: March 17, 2020
    Inventor: Pui Sze Lau
  • Publication number: 20190157436
    Abstract: The present invention relates to a power semiconductor device structure and a fabrication process, and provides a high-performance RC-IGBT structure that can be fabricated without a thin wafer process. To achieve this objective, the present invention provides an RC-IGBT structure, including: an emitter electrode at the front surface; a plurality of cells under the emitter electrode; an n? drift region under the cells; a collector electrode located at the back surface; a plurality of trenches located at the back surface and being filled by the collector electrode; a mechanical support semiconductor region located between the trenches; a p+ collector region located at the top of each trench and connected to the collector electrode; an n buffer region located on top of each p+ collector region and below the n? drift region; and an n+ cathode region at the sidewall of each trench and connected to the collector electrode.
    Type: Application
    Filed: July 11, 2016
    Publication date: May 23, 2019
    Inventor: Pui Sze LAU