Patents by Inventor Pulkit JAIN

Pulkit JAIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200311728
    Abstract: A method of verifying the destination of a transaction between nodes in a network includes receiving transaction information corresponding to a transaction between the nodes, where the transaction information comprises a unique destination identifier and a destination name and where the unique destination identifier defines a destination account of the transaction; obtaining from a storage unit a set of names used in previous transactions to that destination account; determining at least one disparity value between the destination name and the set of names; and producing a destination verification value based on the at least one disparity value, wherein the destination verification value is used to verify whether the transaction between nodes should proceed.
    Type: Application
    Filed: March 20, 2020
    Publication date: October 1, 2020
    Inventors: Ashish Jain, Bhupinder Singh Narang, Pulkit Gupta, Michael Alan Dewar, Jeremy Robert Stephens
  • Publication number: 20200303381
    Abstract: Embodiments herein describe techniques for a semiconductor device including a SRAM device having multiple SRAM memory cells, and a capacitor coupled to the SRAM device. The capacitor includes a first plate, a second plate, and a capacitor dielectric layer between the first plate and the second plate. The capacitor is to supply power to the multiple SRAM memory cells of the SRAM device in parallel for a period of time. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 18, 2019
    Publication date: September 24, 2020
    Inventors: Elijah KARPOV, Brian DOYLE, Abhishek SHARMA, Prashant MAJHI, Pulkit JAIN
  • Publication number: 20200118121
    Abstract: A method and server system for facilitating processing of payment transactions with encrypted images are disclosed. The server system receives an encrypted image from a device of a user. The encrypted image includes a device identifier (ID) associated with the device, and at least one payment transaction information associated with a payment account of the user. The device ID and the at least one payment transaction information are extracted from the encrypted image. The extracted device ID is matched with an available device ID at the server system. Subsequent to successful matching of the device ID with the available device ID, a payment transaction is processed using the payment account based on the at least one payment transaction information.
    Type: Application
    Filed: August 29, 2019
    Publication date: April 16, 2020
    Applicant: Mastercard International Incorporated
    Inventors: Bhupinder Singh Narang, Ashish Jain, Pulkit Gupta
  • Publication number: 20200111105
    Abstract: A method for rewarding carbon sequestration includes: receiving a carbon sequestration notification, wherein the carbon sequestration notification includes at least an amount of sequestered carbon dioxide and an entity identifier associated with an entity that sequestered the amount of sequestered carbon dioxide; receiving a verification message, wherein the verification message includes at least the entity identifier and an indication of successful verification of the entity as sequestering the amount of sequestered carbon dioxide; generating a digital signature using a private key of a cryptographic key pair; identifying a destination address associated with the entity based on at least the entity identifier; and transmitting at least the digital signature, destination address, one or more source addresses, and a currency amount based on the amount of sequestered carbon dioxide to a node in a blockchain network.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 9, 2020
    Applicant: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Pulkit Gupta, Ashish Jain, Bhupinder Singh Narang, Shuvam Sengupta
  • Patent number: 10573809
    Abstract: An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; and an oxide layer between the OEL and the bottom electrode; wherein the oxide layer includes Deuterium and oxygen vacancies. Other embodiments are described herein.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 25, 2020
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Ravi Pillarisetty, Uday Shah, Elijah V. Karpov, Niloy Mukherjee, Pulkit Jain, Aravind S. Killampalli, Jay P. Gupta, James S. Clarke
  • Publication number: 20200034009
    Abstract: A system and method for performing context-based actions in an electronic device is provided. The method includes selecting one or more first graphical objects in the electronic device, detecting a drag-and-drop event on the selected one or more first graphical objects involving manipulation of the one or more first graphical objects over one or more second graphical objects, and identifying a context associated with each of the one or more first graphical objects and the one or more second graphical objects in response to the detected drag-and-drop event, wherein the context of the one or more first graphical objects is shared with the one or more second graphical objects. Furthermore, the method includes performing one or more actions in the electronic device based on the identified context.
    Type: Application
    Filed: July 25, 2019
    Publication date: January 30, 2020
    Inventors: Ankur SHARMA, Anupriya TEWARI, Arpit AGRAWAL, Pulkit JAIN, Shashi SINGH
  • Publication number: 20200005866
    Abstract: Some embodiments include apparatuses having a resistive memory device and methods to apply a combination of voltage stepping current stepping and pulse width stepping during an operation of changing a resistance of a memory cell of the resistive memory device. The apparatuses also include a write termination circuit to limit drive current provided to a memory cell of the resistive memory device during a particular time of an operation performed on the memory cell. The apparatuses further include a programmable variable resistor and resistor control circuit that operate during sensing operation of the memory device.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 2, 2020
    Inventors: Pulkit Jain, Umut Arslan, Fatih Hamzaoglu
  • Patent number: 10515697
    Abstract: Some embodiments include apparatuses having a resistive memory device and methods to apply a combination of voltage stepping current stepping and pulse width stepping during an operation of changing a resistance of a memory cell of the resistive memory device. The apparatuses also include a write termination circuit to limit drive current provided to a memory cell of the resistive memory device during a particular time of an operation performed on the memory cell. The apparatuses further include a programmable variable resistor and resistor control circuit that operate during sensing operation of the memory device.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 24, 2019
    Assignee: Intel Corporation
    Inventors: Pulkit Jain, Umut Arslan, Fatih Hamzaoglu
  • Patent number: 10325510
    Abstract: An interactive system for facilitating interaction between one or more users is provided. The system includes computing devices accessible to several users, including a user interface to enable the user to activate an interaction session amongst a selected set of users; and a plurality of interactive tools to enable each user to communicate with the selected set of users via the user interface. The interactive system includes a session data module to acquire session data from each computing device. The session data module is to acquire session data from each computing device. The interactive system also includes a processing engine to compute an effectiveness score and an engagement score of the interaction session by analyzing the session data. The effectiveness score and the engagement score is continuously computed for a duration and a quality score is calculated as a function of the engagement score and the effectiveness score.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: June 18, 2019
    Assignee: VEDANTU INNOVATIONS PVT LTD.
    Inventors: Pulkit Jain, Ajith Reddy, Pranav Ramaraya Mallar, Namo Narain Kaul, Mehar Chandra Palamakula
  • Publication number: 20190036020
    Abstract: An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; and an oxide layer between the OEL and the bottom electrode; wherein the oxide layer includes Deuterium and oxygen vacancies. Other embodiments are described herein.
    Type: Application
    Filed: March 31, 2016
    Publication date: January 31, 2019
    Inventors: Prashant Majhi, Ravi Pillarisetty, Uday Shah, Elijah V. Karpov, Niloy Mukherjee, Pulkit Jain, Aravind S. Killampalli, Jay P. Gupta, James S. Clarke
  • Publication number: 20180114453
    Abstract: An interactive system for facilitating interaction between one or more users is provided. The system includes computing devices accessible to several users, including a user interface to enable the user to activate an interaction session amongst a selected set of users; and a plurality of interactive tools to enable each user to communicate with the selected set of users via the user interface. The interactive system includes a session data module to acquire session data from each computing device. The session data module is to acquire session data from each computing device. The interactive system also includes a processing engine to compute an effectiveness score and an engagement score of the interaction session by analyzing the session data. The effectiveness score and the engagement score is continuously computed for a duration and a quality score is calculated as a function of the engagement score and the effectiveness score.
    Type: Application
    Filed: December 15, 2016
    Publication date: April 26, 2018
    Applicant: Vedantu Innovations Pvt Ltd.
    Inventors: Pulkit JAIN, Ajith REDDY, Pranav Ramaraya MALLAR, Namo Narain KAUL, Mehar Chandra PALAMAKULA
  • Patent number: 9922691
    Abstract: An apparatus is described that includes a bit line. The apparatus also includes first and second storage cells coupled to the bit line. The first storage cell has a first access transistor. The first access transistor is coupled to a first line resistance. The second storage cell has a second access transistor. The second access transistor is coupled to a second line resistance. The second line resistance is greater than the first line resistance. The apparatus also includes first and second drivers that are coupled to the bit line. The second driver is a stronger driver than the first driver. The apparatus also includes circuitry to select the first driver to write information into the first storage cell and select the second driver to write information into the second storage cell.
    Type: Grant
    Filed: March 5, 2016
    Date of Patent: March 20, 2018
    Assignee: Intel Corporation
    Inventors: Pulkit Jain, Fatih Hamzaoglu, Liqiong Wei
  • Patent number: 9805790
    Abstract: Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: memory element including a first inverting device cross-coupled to a second inverting device; a restore circuit having at least one resistive memory element, the restore circuit coupled to an output of the first inverting device; a third inverting device coupled to the output of the first inverting device; a fourth inverting device coupled to an output of the third inverting device; and a save circuit having at least one resistive memory element, the save circuit coupled to an output of the third inverting device.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: October 31, 2017
    Assignee: Intel Corporation
    Inventors: Nathaniel J. August, Pulkit Jain, Stefan Rusu, Fatih Hamzaoglu, Rangharajan Venkatesan, Muhammad Khellah, Charles Augustine, Carlos Tokunaga, James W. Tschanz, Yih Wang
  • Patent number: 9703982
    Abstract: An electronic signature comprises an authenticated audio and/or visual recording of a spoken assent that conforms to a pre-established phrase. Alternatively, an electronic signature comprises an authenticated visual recording of a series of physical gestures that conforms to a pre-established sequence. Rules are established with respect to how the assent is to be recorded and authenticated. These rules, as well as the document itself, are provided to a document recipient. If the document recipient assents to the document, an audio and/or visual recording of the assent is generated. Location information that defines or approximates the geographical location where the document recipient recorded the assent is also optionally recorded as well. Once recorded, the assent can be authenticated using any of a variety of suitable authentication processes. An authenticated assent can be considered a legally binding electronic signature that forms a part of, or is otherwise associated with, the document.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: July 11, 2017
    Assignee: ADOBE SYSTEMS INCORPORATED
    Inventors: Divij Kumar, Neha Saxena, Aditya Kumar Pandey, Nikhil Dang, Pulkit Jain
  • Publication number: 20170047105
    Abstract: An apparatus is described that includes a bit line. The apparatus also includes first and second storage cells coupled to the bit line. The first storage cell has a first access transistor. The first access transistor is coupled to a first line resistance. The second storage cell has a second access transistor. The second access transistor is coupled to a second line resistance. The second line resistance is greater than the first line resistance. The apparatus also includes first and second drivers that are coupled to the bit line. The second driver is a stronger driver than the first driver. The apparatus also includes circuitry to select the first driver to write information into the first storage cell and select the second driver to write information into the second storage cell.
    Type: Application
    Filed: March 5, 2016
    Publication date: February 16, 2017
    Inventors: PULKIT JAIN, FATIH HAMZAOGLU, LIQIONG WEI
  • Publication number: 20160232968
    Abstract: Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: memory element including a first inverting device cross-coupled to a second inverting device; a restore circuit having at least one resistive memory element, the restore circuit coupled to an output of the first inverting device; a third inverting device coupled to the output of the first inverting device; a fourth inverting device coupled to an output of the third inverting device; and a save circuit having at least one resistive memory element, the save circuit coupled to an output of the third inverting device.
    Type: Application
    Filed: December 5, 2013
    Publication date: August 11, 2016
    Applicant: Intel Corporation
    Inventors: Nathaniel J. AUGUST, Pulkit JAIN, Stefan RUSU, Fatih HAMZAOGLU, Rangharajan VENKATESAN, Muhammad KHELLAH, Charles AUGUSTINE, Carlos TOKUNAGA, James W. TSCHANZ, Yih WANG
  • Patent number: 9377839
    Abstract: Systems and methods for dynamic battery management of mobile devices are disclosed. In some implementations, a battery management application at the mobile device can enable a user to configure operational priority values for one or more software applications installed on the device, a battery threshold value for the mobile device and device resources needed by prioritized applications. In some implementations, mobile devices across a network can be managed remotely through a device management application. The device management application can obtain operational priority values for one or more software applications executing on one or more devices. The device management application can identify respective battery thresholds for the devices and remotely control operation of the software applications based on their respective operational priorities and the identified battery thresholds.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: June 28, 2016
    Assignee: VERIZON PATENT AND LICENSING INC.
    Inventors: Shan K. Sasidharan, Rajesh M. Narayanan, Raghuram Ayalur Muralikrishnan, Vijayakumar Rajagopal, Pulkit Jain, Sireesh Chandra Mutharaju, Sravan C. Reddy
  • Publication number: 20160132693
    Abstract: An electronic signature comprises an authenticated audio and/or visual recording of a spoken assent that conforms to a pre-established phrase. Alternatively, an electronic signature comprises an authenticated visual recording of a series of physical gestures that conforms to a pre-established sequence. Rules are established with respect to how the assent is to be recorded and authenticated. These rules, as well as the document itself, are provided to a document recipient. If the document recipient assents to the document, an audio and/or visual recording of the assent is generated. Location information that defines or approximates the geographical location where the document recipient recorded the assent is also optionally recorded as well. Once recorded, the assent can be authenticated using any of a variety of suitable authentication processes. An authenticated assent can be considered a legally binding electronic signature that forms a part of, or is otherwise associated with, the document.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 12, 2016
    Applicant: ADOBE SYSTEMS INCORPORATED
    Inventors: Divij Kumar, Neha Saxena, Aditya Kumar Pandey, Nikhil Dang, Pulkit Jain
  • Patent number: 9281043
    Abstract: An apparatus is described that includes a bit line. The apparatus also includes first and second storage cells coupled to the bit line. The first storage cell has a first access transistor. The first access transistor is coupled to a first line resistance. The second storage cell has a second access transistor. The second access transistor is coupled to a second line resistance. The second line resistance is greater than the first line resistance. The apparatus also includes first and second drivers that are coupled to the bit line. The second driver is a stronger driver than the first driver. The apparatus also includes circuitry to select the first driver to write information into the first storage cell and select the second driver to write information into the second storage cell.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: March 8, 2016
    Assignee: Intel Corporation
    Inventors: Pulkit Jain, Fatih Hamzaoglu, Liqiong Wei
  • Publication number: 20150153810
    Abstract: Systems and methods for dynamic battery management of mobile devices are disclosed. In some implementations, a battery management application at the mobile device can enable a user to configure operational priority values for one or more software applications installed on the device, a battery threshold value for the mobile device and device resources needed by prioritized applications. In some implementations, mobile devices across a network can be managed remotely through a device management application. The device management application can obtain operational priority values for one or more software applications executing on one or more devices. The device management application can identify respective battery thresholds for the devices and remotely control operation of the software applications based on their respective operational priorities and the identified battery thresholds.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 4, 2015
    Applicant: VERIZON PATENT AND LICENSING INC.
    Inventors: Shan K. SASIDHARAN, Rajesh M. NARAYANAN, Raghuram Ayalur MURALIKRISHNAN, Vijayakumar RAJAGOPAL, Pulkit JAIN, Sireesh Chandra MUTHARAJU, Sravan C. REDDY