Abstract: Operating a low-latency database analysis system with phrase translation may include obtaining a locale-specific phrase localization rule and a canonical phrase localization rule for a phrase, generating a locale-specific index and a locale-specific finite state machine for the locale using the localization definition data and a canonical finite state machine, generating a resolved-request by obtaining a locale-specific token representing locale-specific input data by traversing the locale-specific index, obtaining a canonical token associated with locale-specific token, obtaining a locale-specific phrase by traversing the locale-specific finite state machine, obtaining a canonical phrase corresponding to the locale-specific phrase, the canonical phrase including the canonical token, generate a data-query based on the canonical phrase, obtaining results data responsive to the data expressing the usage intent by executing a query corresponding to the data-query by an in-memory database of the low-latency datab

Abstract: Techniques and mechanisms for accessing memory arrays which are formed in a back end of line (BEOL) of an integrated circuit (IC) die. In an embodiment, a differential sense amplifier of the IC die is coupled to a first array and a second array via a first bit line and a second bit line, respectively. The first bit line and the second bit line extend from a first level of BEOL memory arrays, toward a front end of line (FEOL) of the IC die, on opposite respective sides of first array, wherein the differential sense amplifier is in a footprint region for the first memory array. In another embodiment, a word line driver circuit comprises a two stage charger-discharger circuit which mitigates hot carrier injection.

Abstract: A system for dynamically grouping a plurality of learners during a live learning session delivered via an online learning platform is presented. The system includes a data module and a processor operatively coupled to the data module. The processor includes a feature generator, a parameter analyzer, a group optimizer, and a reassignment module. A related method is also presented.

Abstract: A device structure includes transistors on a first level in a first region and a first plurality of capacitors on a second level, above the first level, where a first electrode of the individual ones of the first plurality of capacitors are coupled with a respective transistor. The device structure further includes a second plurality of capacitors on the second level in a second region adjacent the first region, where individual ones of the second plurality of capacitors include a second electrode, a third electrode and an insulator layer therebetween, where the second electrode of the individual ones of the plurality of capacitors are coupled with a first interconnect on a third level above the second level, and where the third electrode of the individual ones of the plurality of capacitors are coupled with a second interconnect.

Abstract: A system for determining instructor effectiveness scores for interactive learning sessions delivered via an online learning platform to a plurality of learners is presented. The system includes a data module and a processor. The data module is operatively coupled to the online learning platform and a computing device used by an instructor to deliver the online learning sessions, the data module configured to access in-session data, post-session data, and content metadata for a first plurality of learning sessions delivered by the instructor. The processor is operatively coupled to the data module, and includes a feature generator, a score estimator, and a notification module.

Abstract: A system for determining real-time learner engagement scores in interactive learning sessions delivered via an online learning platform is presented. The system includes a data module and a processor operatively coupled to the data module. The processor includes a feature generator, a training module, an engagement score generator, and a notification module. A related method is also presented.

Abstract: A system and method for performing context-based actions in an electronic device is provided. The method includes selecting one or more first graphical objects in the electronic device, detecting a drag-and-drop event on the selected one or more first graphical objects involving manipulation of the one or more first graphical objects over one or more second graphical objects, and identifying a context associated with each of the one or more first graphical objects and the one or more second graphical objects in response to the detected drag-and-drop event, wherein the context of the one or more first graphical objects is shared with the one or more second graphical objects. Furthermore, the method includes performing one or more actions in the electronic device based on the identified context.

Abstract: Embodiments herein describe techniques for a semiconductor device including a SRAM device having multiple SRAM memory cells, and a capacitor coupled to the SRAM device. The capacitor includes a first plate, a second plate, and a capacitor dielectric layer between the first plate and the second plate. The capacitor is to supply power to the multiple SRAM memory cells of the SRAM device in parallel for a period of time. Other embodiments may be described and/or claimed.

Abstract: An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; and an oxide layer between the OEL and the bottom electrode; wherein the oxide layer includes Deuterium and oxygen vacancies. Other embodiments are described herein.

Abstract: A system and method for performing context-based actions in an electronic device is provided. The method includes selecting one or more first graphical objects in the electronic device, detecting a drag-and-drop event on the selected one or more first graphical objects involving manipulation of the one or more first graphical objects over one or more second graphical objects, and identifying a context associated with each of the one or more first graphical objects and the one or more second graphical objects in response to the detected drag-and-drop event, wherein the context of the one or more first graphical objects is shared with the one or more second graphical objects. Furthermore, the method includes performing one or more actions in the electronic device based on the identified context.

Abstract: Some embodiments include apparatuses having a resistive memory device and methods to apply a combination of voltage stepping current stepping and pulse width stepping during an operation of changing a resistance of a memory cell of the resistive memory device. The apparatuses also include a write termination circuit to limit drive current provided to a memory cell of the resistive memory device during a particular time of an operation performed on the memory cell. The apparatuses further include a programmable variable resistor and resistor control circuit that operate during sensing operation of the memory device.

Abstract: Some embodiments include apparatuses having a resistive memory device and methods to apply a combination of voltage stepping current stepping and pulse width stepping during an operation of changing a resistance of a memory cell of the resistive memory device. The apparatuses also include a write termination circuit to limit drive current provided to a memory cell of the resistive memory device during a particular time of an operation performed on the memory cell. The apparatuses further include a programmable variable resistor and resistor control circuit that operate during sensing operation of the memory device.

Abstract: An interactive system for facilitating interaction between one or more users is provided. The system includes computing devices accessible to several users, including a user interface to enable the user to activate an interaction session amongst a selected set of users; and a plurality of interactive tools to enable each user to communicate with the selected set of users via the user interface. The interactive system includes a session data module to acquire session data from each computing device. The session data module is to acquire session data from each computing device. The interactive system also includes a processing engine to compute an effectiveness score and an engagement score of the interaction session by analyzing the session data. The effectiveness score and the engagement score is continuously computed for a duration and a quality score is calculated as a function of the engagement score and the effectiveness score.

Abstract: An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; and an oxide layer between the OEL and the bottom electrode; wherein the oxide layer includes Deuterium and oxygen vacancies. Other embodiments are described herein.

Abstract: An interactive system for facilitating interaction between one or more users is provided. The system includes computing devices accessible to several users, including a user interface to enable the user to activate an interaction session amongst a selected set of users; and a plurality of interactive tools to enable each user to communicate with the selected set of users via the user interface. The interactive system includes a session data module to acquire session data from each computing device. The session data module is to acquire session data from each computing device. The interactive system also includes a processing engine to compute an effectiveness score and an engagement score of the interaction session by analyzing the session data. The effectiveness score and the engagement score is continuously computed for a duration and a quality score is calculated as a function of the engagement score and the effectiveness score.

Abstract: An apparatus is described that includes a bit line. The apparatus also includes first and second storage cells coupled to the bit line. The first storage cell has a first access transistor. The first access transistor is coupled to a first line resistance. The second storage cell has a second access transistor. The second access transistor is coupled to a second line resistance. The second line resistance is greater than the first line resistance. The apparatus also includes first and second drivers that are coupled to the bit line. The second driver is a stronger driver than the first driver. The apparatus also includes circuitry to select the first driver to write information into the first storage cell and select the second driver to write information into the second storage cell.

Abstract: Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: memory element including a first inverting device cross-coupled to a second inverting device; a restore circuit having at least one resistive memory element, the restore circuit coupled to an output of the first inverting device; a third inverting device coupled to the output of the first inverting device; a fourth inverting device coupled to an output of the third inverting device; and a save circuit having at least one resistive memory element, the save circuit coupled to an output of the third inverting device.

Abstract: An electronic signature comprises an authenticated audio and/or visual recording of a spoken assent that conforms to a pre-established phrase. Alternatively, an electronic signature comprises an authenticated visual recording of a series of physical gestures that conforms to a pre-established sequence. Rules are established with respect to how the assent is to be recorded and authenticated. These rules, as well as the document itself, are provided to a document recipient. If the document recipient assents to the document, an audio and/or visual recording of the assent is generated. Location information that defines or approximates the geographical location where the document recipient recorded the assent is also optionally recorded as well. Once recorded, the assent can be authenticated using any of a variety of suitable authentication processes. An authenticated assent can be considered a legally binding electronic signature that forms a part of, or is otherwise associated with, the document.

Abstract: An apparatus is described that includes a bit line. The apparatus also includes first and second storage cells coupled to the bit line. The first storage cell has a first access transistor. The first access transistor is coupled to a first line resistance. The second storage cell has a second access transistor. The second access transistor is coupled to a second line resistance. The second line resistance is greater than the first line resistance. The apparatus also includes first and second drivers that are coupled to the bit line. The second driver is a stronger driver than the first driver. The apparatus also includes circuitry to select the first driver to write information into the first storage cell and select the second driver to write information into the second storage cell.

Abstract: Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: memory element including a first inverting device cross-coupled to a second inverting device; a restore circuit having at least one resistive memory element, the restore circuit coupled to an output of the first inverting device; a third inverting device coupled to the output of the first inverting device; a fourth inverting device coupled to an output of the third inverting device; and a save circuit having at least one resistive memory element, the save circuit coupled to an output of the third inverting device.