Patents by Inventor Puneet Paresh Nipunage

Puneet Paresh Nipunage has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Single-wire bus (SuBUS) slave circuit and related apparatus
    Patent number: 11106615
    Abstract: A single-wire bus (SuBUS) slave circuit is provided. The SuBUS slave circuit is coupled to a SuBUS bridge circuit via a SuBUS and can be configured to perform a slave task that may block communication on the SuBUS. Notably, the SuBUS slave circuit may not be equipped with an accurate timing reference source that can determine a precise timing for terminating the slave task and unblock the SuBUS. Instead, the SuBUS slave circuit is configured to terminate the slave task and unblock the SuBUS based on a self-determined slave free-running-oscillator count derived from a start-of-sequence training sequence that precedes any SuBUS telegram of a predefined SuBUS operation, even though the SuBUS operation is totally unrelated to the slave task. As such, it may be possible to eliminate the accurate timing reference source from the SuBUS slave circuit, thus helping to reduce cost and current drain in the SuBUS slave circuit.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 31, 2021
    Assignee: Qorvo US, Inc.
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala, Puneet Paresh Nipunage
  • SINGLE-WIRE BUS (SuBUS) SLAVE CIRCUIT AND RELATED APPARATUS
    Publication number: 20200226089
    Abstract: A single-wire bus (SuBUS) slave circuit is provided. The SuBUS slave circuit is coupled to a SuBUS bridge circuit via a SuBUS and can be configured to perform a slave task that may block communication on the SuBUS. Notably, the SuBUS slave circuit may not be equipped with an accurate timing reference source that can determine a precise timing for terminating the slave task and unblock the SuBUS. Instead, the SuBUS slave circuit is configured to terminate the slave task and unblock the SuBUS based on a self-determined slave free-running-oscillator count derived from a start-of-sequence training sequence that precedes any SuBUS telegram of a predefined SuBUS operation, even though the SuBUS operation is totally unrelated to the slave task. As such, it may be possible to eliminate the accurate timing reference source from the SuBUS slave circuit, thus helping to reduce cost and current drain in the SuBUS slave circuit.
    Type: Application
    Filed: January 7, 2020
    Publication date: July 16, 2020
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala, Puneet Paresh Nipunage
  • Single-wire bus (SuBUS) slave circuit and related apparatus
    Patent number: 10599601
    Abstract: A single-wire bus (SuBUS) slave circuit is provided. The SuBUS slave circuit is coupled to a SuBUS bridge circuit via a SuBUS and can be configured to perform a slave task that may block communication on the SuBUS. Notably, the SuBUS slave circuit may not be equipped with an accurate timing reference source that can determine a precise timing for terminating the slave task and unblock the SuBUS. Instead, the SuBUS slave circuit is configured to terminate the slave task and unblock the SuBUS based on a self-determined slave free-running-oscillator count derived from a start-of-sequence training sequence that precedes any SuBUS telegram of a predefined SuBUS operation, even though the SuBUS operation is totally unrelated to the slave task. As such, it may be possible to eliminate the accurate timing reference source from the SuBUS slave circuit, thus helping to reduce cost and current drain in the SuBUS slave circuit.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: March 24, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala, Puneet Paresh Nipunage