Patents by Inventor Puneet Wadhawan

Puneet Wadhawan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ADAPTIVE DRAM (DYNAMIC RANDOM ACCESS MEMORY) BURST LENGTH FOR INLINE ECC (ERROR CHECKING AND CORRECTION)
    Publication number: 20220093202
    Abstract: In a memory subsystem, the memory device and memory controller can exchange data at either a first burst length or a second burst length longer than the first burst length. The memory subsystem includes a cache or other circuitry to buffer ECC (error checking and correction) bits. The memory controller can generate a data read request to read data from memory and a separate ECC read request to read the ECC bits. The ECC cache can buffer ECC bits for multiple data read requests. The memory controller can dynamically switch the ECC read request between the first burst length and the second burst length based on usage of the ECC cache.
    Type: Application
    Filed: November 30, 2021
    Publication date: March 24, 2022
    Inventors: Puneet WADHAWAN, Sambaran MITRA
  • Method and system for automatically controlling the insertion of control word in CPRI daisy chain configuration
    Patent number: 9392640
    Abstract: A method and apparatus automatically controls the insertion of information flow data over a shared CPRI link (561) by providing a hardware control mechanism (504-509) at a local radio base station subsystem (501) connected in a CPRI daisy chain configuration between a downstream RE device (570) and an upstream REC device (560) for determining whether the control word being transmitted is sourced from a downstream device (e.g., forwarded data from a downstream RE device) or from the local device.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: July 12, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Tuongvu V. Nguyen, John J. Vaglica, Roy Shor, Somvir Dahiya, Ori Goren, Avraham Horn, Arvind Kaushik, Arindam Sinha, Puneet Wadhawan
  • Method and System for Automatically Controlling the Insertion of Control Word in CPRI Daisy Chain Configuration
    Publication number: 20140094157
    Abstract: A method and apparatus automatically controls the insertion of information flow data over a shared CPRI link (561) by providing a hardware control mechanism (504-509) at a local radio base station subsystem (501) connected in a CPRI daisy chain configuration between a downstream RE device (570) and an upstream REC device (560) for determining whether the control word being transmitted is sourced from a downstream device (e.g., forwarded data from a downstream RE device) or from the local device.
    Type: Application
    Filed: October 1, 2012
    Publication date: April 3, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Tuongvu V. Nguyen, John J. Vaglica, Roy Shor, Somvir Dahiya, Ori Goren, Avraham Horn, Arvind Kaushik, Arindam Sinha, Puneet Wadhawan