Patents by Inventor Punit Bhola

Punit Bhola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DMOS transistor with a slanted super junction drift structure
    Patent number: 8878295
    Abstract: A DMOS transistor with a lower on-state drain-to-source resistance and a higher breakdown voltage utilizes a slanted super junction drift structure that lies along the side wall of an opening with the drain region at the bottom of the opening and the source region near the top of the opening.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: November 4, 2014
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Alexei Sadovnikov, William French, Erika Mazotti, Richard Wendell Foote, Jr., Punit Bhola, Vladislav Vashchenko
  • DMOS Transistor with a cavity that lies below the drift region
    Patent number: 8524548
    Abstract: A lateral DMOS transistor formed on a silicon-on-insulator (SOI) structure has a higher breakdown voltage that results from a cavity that is formed in the bulk region of the SOI structure. The cavity exposes a portion of the bottom surface of the insulator layer of the SOI structure that lies directly vertically below the drift region of the DMOS transistor.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: September 3, 2013
    Assignee: National Semiconductor Corporation
    Inventors: William French, Vladislav Vashchenko, Richard Wendell Foote, Jr., Alexei Sadovnikov, Punit Bhola, Peter J. Hopper
  • DMOS Transistor with a Cavity that Lies Below the Drift Region
    Publication number: 20120273881
    Abstract: A lateral DMOS transistor formed on a silicon-on-insulator (SOI) structure has a higher breakdown voltage that results from a cavity that is formed in the bulk region of the SOI structure. The cavity exposes a portion of the bottom surface of the insulator layer of the SOI structure that lies directly vertically below the drift region of the DMOS transistor.
    Type: Application
    Filed: April 26, 2011
    Publication date: November 1, 2012
    Inventors: William French, Vladislav Vashchenko, Richard Wendell Foote, JR., Alexei Sadovnikov, Punit Bhola, Peter J. Hopper
  • DMOS Transistor with a Slanted Super Junction Drift Structure
    Publication number: 20120261753
    Abstract: A DMOS transistor with a lower on-state drain-to-source resistance and a higher breakdown voltage utilizes a slanted super junction drift structure that lies along the side wall of an opening with the drain region at the bottom of the opening and the source region near the top of the opening.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 18, 2012
    Inventors: Peter J. Hopper, Alexei Sadovnikov, William French, Erika Mazotti, Richard Wendell Foote, JR., Punit Bhola, Vladislav Vashchenko