Patents by Inventor Punit P. Chiniwalla

Punit P. Chiniwalla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8755644
    Abstract: Method of fabricating a semiconductor die with a microlens associated therewith. More particularly, a method for fabricating a vertical channel guide optical via through a silicon substrate wherein the optical via can contain lens elements, a discrete index gradient guiding pillar and other embodiments. Also disclosed are means for transferring, coupling and or focusing light from an electronic-optical device on the top of a semiconductor substrate through the substrate to a waveguiding medium below the substrate. The high alignment accuracies afforded by standard semiconductor fabrication processes are exploited so as to obviate the need for active alignment of the optical coupling or light guiding elements.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Punit P. Chiniwalla, Chirag S. Patel
  • Patent number: 7883277
    Abstract: For integrated circuits including circuit packaging and circuit communication technologies provision is made for a method of interconnecting or mapping a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array. Also provided is an arrangement for the interconnecting or mapping of a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: February 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Punit P. Chiniwalla, John A. Guckenberger, Jeffrey A. Kash, Jeremy D. Schaub, Michael Tan, Jeannine M. Trewhella, Garry Trott
  • Publication number: 20100322551
    Abstract: Method of fabricating a semiconductor die with a microlens associated therewith. More particularly, a method for fabricating a vertical channel guide optical via through a silicon substrate wherein the optical via can contain lens elements, a discrete index gradient guiding pillar and other embodiments. Also disclosed are means for transferring, coupling and or focusing light from an electronic-optical device on the top of a semiconductor substrate through the substrate to a waveguiding medium below the substrate. The high alignment accuracies afforded by standard semiconductor fabrication processes are exploited so as to obviate the need for active alignment of the optical coupling or light guiding elements.
    Type: Application
    Filed: April 1, 2008
    Publication date: December 23, 2010
    Inventors: Russell A. Budd, Punit P. Chiniwalla, Chirag S. Patel
  • Patent number: 7613368
    Abstract: Integrated optoelectronic chips or collections of chips on a module that have both electrical as well as optical interconnects offer many advantages in speed, power consumption and heat generation. Mixed signal types, however, pose significant packaging challenges. This invention describes a land grid array (LGA) interposer which can simultaneously connect electrical and optical signals from a module to a printed circuit board.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: November 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Gareth G. Hougham, Russell A. Budd, Punit P. Chiniwalla, Paul W. Coteus, Alphonso P. Lanzetta, Frank R. Libsch
  • Patent number: 7480429
    Abstract: An apparatus for optical communication is provided. The apparatus includes a first waveguide formed on a first surface and a second waveguide formed on a second surface. The first and second surfaces are bonded together to form an air gap between the first and second surfaces and diffraction gratings of the first and second waveguides are facing each other. A third waveguide is formed on a third surface, and the third surface is bonded to the second surface so an air gap exists between the third and second surface and diffraction gratings of the third and second wave guides face each other. The light beam passes from the second wave guide across the air gap and into the third waveguide.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: January 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Punit P. Chiniwalla, Philip Hobbs, Theodore G. van Kessel
  • Patent number: 7474815
    Abstract: For integrated circuits including circuit packaging and circuit communication technologies provision is made for a method of interconnecting or mapping a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array. Also provided is an arrangement for the interconnecting or mapping of a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Punit P. Chiniwalla, John A. Guckenberger, Jeffrey A. Kash, Jeremy D. Schaub, Michael Tan, Jeannine M. Trewhella, Garry Trott
  • Publication number: 20090003762
    Abstract: An apparatus for optical communication is provided. The apparatus includes a first waveguide formed on a first surface and a second waveguide formed on a second surface.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 1, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Punit P. Chiniwalla, Philip Hobbs, Theodore G. van Kessel
  • Publication number: 20080205817
    Abstract: For integrated circuits including circuit packaging and circuit communication technologies provision is made for a method of interconnecting or mapping a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array. Also provided is an arrangement for the interconnecting or mapping of a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array.
    Type: Application
    Filed: May 9, 2008
    Publication date: August 28, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Russell A. Budd, Punit P. Chiniwalla, John A. Guckenberger, Jeffrey A. Kash, Jeremy D. Schaub, Michael Tan, Jeannine M. Trewhella, Garry Trott
  • Patent number: 7367715
    Abstract: A structure that possesses the combined properties of carrying signals through the provision of a series of electrical conductors, and by optical signals through the intermediary of a series of optical waveguides. This imparts a particular advantage thereto for the fabrication of optical data links, providing a convenient, compact method of interconnecting electrical paths to transducer chips and to waveguide structures. This approach solves the problem of connecting polymer waveguides to VCSEL (Vertical-Cavity-Surface-Emitting Laser) arrays, thereby avoiding the problem of damaging fragile wire bonds. A method is also provided which utilizes the foregoing structure.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: May 6, 2008
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Punit P. Chiniwalla, Derek B. Dove, James L. Sanford
  • Patent number: 7352066
    Abstract: Method of fabricating a semiconductor die with a microlens associated therewith. More particularly, a method for fabricating a vertical channel guide optical via through a silicon substrate wherein the optical via can contain lens elements, a discrete index gradient guiding pillar and other embodiments. Also disclosed are means for transferring, coupling and or focusing light from an electronic-optical device on the top of a semiconductor substrate through the substrate to a waveguiding medium below the substrate. The high alignment accuracies afforded by standard semiconductor fabrication processes are exploited so as to obviate the need for active alignment of the optical coupling or light guiding elements.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: April 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Punit P. Chiniwalla, Chirag S. Patel