Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be an embedded-system device. The embedded-system device receives a first message including first command or data from a client. The embedded-system device triggers a BIOS of a host of the embedded-system device to communicate with the embedded-system device. The embedded-system device receives a request from the BIOS. The embedded-system device sends the first command or data to the BIOS in response to the request.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be an embedded-system device. The embedded-system device receives a first message including first command or data from a client. The embedded-system device triggers a BIOS of a host of the embedded-system device to communicate with the embedded-system device. The embedded-system device receives a request from the BIOS. The embedded-system device sends the first command or data to the BIOS in response to the request.

Abstract: In one aspect, a system includes a service processor (SP), having a processor, a non-volatile memory and a communication interface. The SP receives a component information of components of a host computer from a basic input/output system (BIOS) being executed at a central processing unit (CPU) of the host computer through the communication interface, and stores the received component information in the non-volatile memory. When the SP receives an instruction to display a physical layout of the components of the host computer, the SP retrieves the component information for each of the components stored in the non-volatile memory, and generates corresponding display information for each of the components based on the retrieved component information. Then the SP may send the display information to a remote management computer to display a graphical diagram of the physical layout on a display device at the remote management computer.

Abstract: In one aspect, a system includes a service processor (SP), having a processor, a non-volatile memory and a communication interface. The SP receives a component information of components of a host computer from a basic input/output system (BIOS) being executed at a central processing unit (CPU) of the host computer through the communication interface, and stores the received component information in the non-volatile memory. When the SP receives a managing instruction from a remote management computer to change the component information of at least one designated component of the components of the host computer, the SP updates the corresponding component information stored in the non-volatile memory based on the managing instruction. Once the component information is updated, the SP may, in response to receiving the component information from the BIOS, send the updated component information back to the host computer through the communication interface.

Abstract: In certain aspects, a system for out-of-band configuring BIOS setting data (BIOSSD) includes a host computer and a service processor (SP). The SP stores a BIOSSD collection and a human interface data (HID) collection. The HID collection includes questions for data of the BIOSSD collection and corresponding options for each question. When a remote management computer sends to the SP an information request, the SP retrieves the HID collection and transmits the questions and the corresponding options to the remote management computer. In response to a command indicating a selected corresponding option, the SP changes corresponding data of the BIOSSD collection according to the command. When the BIOS executed at the host computer issues a BIOSSD update request to the SP, the SP transmits a copy of the BIOSSD collection to the BIOS chip of the host computer to replace the BIOSSD collection stored in the BIOS chip.

Abstract: Certain aspects direct to systems and methods to perform service processor (SP) initiated data transaction with a host computer utilizing power off commands. In certain embodiments, the system includes a SP, which includes a processor, a non-volatile memory and a communication interface. The SP generates a first power off command for a data transaction purpose, and sends the first power off command to the host computer to initiate a data transaction. The OS, in response to the first power off command, calls an Advanced Configuration and Power Interface (ACPI) Machine Language (AML) code, which execute a system management interface (SMI) handler at the CPU to enter a system management mode (SMM). The SMI handler then sends a notification to the SP via the communication interface. In response to receiving the notification from the SMI handler, the SP starts performing the data transaction with the host computer.

Abstract: Certain aspects direct to systems and methods to perform service processor (SP) initiated data transaction with a host computer utilizing interrupts. In certain embodiments, the system includes a SP, which includes a processor, a non-volatile memory and a communication interface. The SP generates a first system management interface (SMI) message, and sends the first SMI message to the host computer to initiate a data transaction. The OS, in response to the first SMI message, execute a SMI handler in a system management random access memory (SMRAM) area at the CPU to enter a system management mode (SMM). The SMI handler then sends the notification to the SP via the communication interface. In response to receiving the notification from the SMI handler, the SP starts performing the data transaction with the host computer.

Abstract: Certain aspects direct to basic input/output system (BIOS) failover update with a service processor (SP). In certain embodiments, the system includes a host computer and a SP. A CPU of the host computer loads and executes a current BIOS image stored in a BIOS chip to a memory as a BIOS instance. The SP receives, from the executed BIOS instance at the host computer, a BIOS image as a failover backup image, and stores the failover backup image in the volatile memory of the SP. When an error occurs at the host computer, the executed BIOS instance sends a request for the failover backup image to the SP. In response, the SP sends a copy of the failover backup image to the host computer such that the executed BIOS instance may replace the current BIOS image stored in the BIOS chip with the copy of the failover backup image.

Abstract: Certain aspects direct to BIOS update with a service processor (SP) without access through a serial peripheral interface (SPI). In certain embodiments, the system includes a SP, which includes a processor, a non-volatile memory, a volatile memory and a system interface. The SP receives a BIOS image from a remote management computer, and stores the BIOS image in the volatile memory. When the SP receives, from a BIOS executed at a central processing unit (CPU) of a host computer through the system interface, a request for the BIOS image, the SP sends a copy of the BIOS image in response to the request for the BIOS image to the host computer through the system interface such that the BIOS executed at the CPU of the host computer replaces a current BIOS image stored in a BIOS chip with the copy of the BIOS image.

Abstract: Methods, apparatus, computer systems, and computer-readable media for creating a firmware identification data structure in a memory device for identifying and validating a firmware are provided. According to one method, a signature, globally unique identifier, and data module category version identifiers are stored in data fields within the data structure. Major and minor version identifiers are modified as corresponding firmware program modules are modified. For validation, a memory device is searched for the signature identifying a firmware identification data structure. The firmware GUID and version identifiers stored within the data structure are used for firmware validation.

Abstract: Certain aspects of the present disclosure relate to a system for replicating BIOS setting data (BIOSSD) across computers. The system includes a plurality of computers, and each computer is connected to a service processor (SP). Each computer includes a BIOS chip, which stores a first BIOSSD collection. The SP stores a second BIOSSD collection. When the first BIOSSD collection is newer, the SP receives a copy of the first BIOSSD collection from the computer to replace the second BIOSSD collection. When the second BIOSSD collection is newer, the SP transmits a copy of the second BIOSSD collection to the computer to replace the first BIOSSD collection in the BIOS chip. A remote management may request and obtain from the SP the updated second BIOSSD collection such that the remote management computer may send the copy the updated second BIOSSD collection to other SP's for update.

Abstract: Certain aspects direct to systems and methods to perform service processor (SP) initiated data transaction with a host computer utilizing power off commands. In certain embodiments, the system includes a SP, which includes a processor, a non-volatile memory and a communication interface. The SP generates a first power off command for a data transaction purpose, and sends the first power off command to the host computer to initiate a data transaction. The OS, in response to the first power off command, calls an Advanced Configuration and Power Interface (ACPI) Machine Language (AML) code, which execute a system management interface (SMI) handler at the CPU to enter a system management mode (SMM). The SMI handler then sends a notification to the SP via the communication interface. In response to receiving the notification from the SMI handler, the SP starts performing the data transaction with the host computer.

Abstract: Certain aspects direct to systems and methods to perform service processor (SP) initiated data transaction with a host computer utilizing interrupts. In certain embodiments, the system includes a SP, which includes a processor, a non-volatile memory and a communication interface. The SP generates a first system management interface (SMI) message, and sends the first SMI message to the host computer to initiate a data transaction. The OS, in response to the first SMI message, execute a SMI handler in a system management random access memory (SMRAM) area at the CPU to enter a system management mode (SMM). The SMI handler then sends the notification to the SP via the communication interface. In response to receiving the notification from the SMI handler, the SP starts performing the data transaction with the host computer.

Abstract: In one aspect, a system includes a service processor (SP), having a processor, a non-volatile memory and a communication interface. The SP receives a component information of components of a host computer from a basic input/output system (BIOS) being executed at a central processing unit (CPU) of the host computer through the communication interface, and stores the received component information in the non-volatile memory. When the SP receives an instruction to display a physical layout of the components of the host computer, the SP retrieves the component information for each of the components stored in the non-volatile memory, and generates corresponding display information for each of the components based on the retrieved component information. Then the SP may send the display information to a remote management computer to display a graphical diagram of the physical layout on a display device at the remote management computer.

Abstract: In one aspect, a system includes a service processor (SP), having a processor, a non-volatile memory and a communication interface. The SP receives a component information of components of a host computer from a basic input/output system (BIOS) being executed at a central processing unit (CPU) of the host computer through the communication interface, and stores the received component information in the non-volatile memory. When the SP receives a managing instruction from a remote management computer to change the component information of at least one designated component of the components of the host computer, the SP updates the corresponding component information stored in the non-volatile memory based on the managing instruction. Once the component information is updated, the SP may, in response to receiving the component information from the BIOS, send the updated component information back to the host computer through the communication interface.

Abstract: Certain aspects direct to systems and methods of BIOS failover update with a service processor (SP) having direct serial peripheral interface (SPI) access to a basic input/output system (BIOS) chip of a host computer. In certain embodiments, the SP receives a failover backup image from a BIOS being executed at a CPU of the host computer through a system interface, and stores the failover backup image in the volatile memory. Then the SP monitors operation of the BIOS by receiving, from the BIOS, a notification signal. When the SP detects an error in the operation of the BIOS based on the notification signal, the SP sends a copy of the failover backup image to the BIOS chip of the host computer through the SPI to replace a current BIOS image stored in the BIOS chip of the host computer with the copy of the failover backup image.

Abstract: In certain aspects, a system for out-of-band configuring BIOS setting data (BIOSSD) includes a host computer and a service processor (SP). The SP stores a BIOSSD collection and a human interface data (HID) collection. The HID collection includes questions for data of the BIOSSD collection and corresponding options for each question. When a remote management computer sends to the SP an information request, the SP retrieves the HID collection and transmits the questions and the corresponding options to the remote management computer. In response to a command indicating a selected corresponding option, the SP changes corresponding data of the BIOSSD collection according to the command. When the BIOS executed at the host computer issues a BIOSSD update request to the SP, the SP transmits a copy of the BIOSSD collection to the BIOS chip of the host computer to replace the BIOSSD collection stored in the BIOS chip.

Abstract: Certain aspects direct to BIOS update with a service processor (SP) without access through a serial peripheral interface (SPI). In certain embodiments, the system includes a SP, which includes a processor, a non-volatile memory, a volatile memory and a system interface. The SP receives a BIOS image from a remote management computer, and stores the BIOS image in the volatile memory. When the SP receives, from a BIOS executed at a central processing unit (CPU) of a host computer through the system interface, a request for the BIOS image, the SP sends a copy of the BIOS image in response to the request for the BIOS image to the host computer through the system interface such that the BIOS executed at the CPU of the host computer replaces a current BIOS image stored in a BIOS chip with the copy of the BIOS image.

Abstract: Certain aspects direct to systems and methods of BIOS failover update with a service processor (SP) having direct serial peripheral interface (SPI) access to a basic input/output system (BIOS) chip of a host computer. In certain embodiments, the SP receives a failover backup image from a BIOS being executed at a CPU of the host computer through a system interface, and stores the failover backup image in the volatile memory. Then the SP monitors operation of the BIOS by receiving, from the BIOS, a notification signal. When the SP detects an error in the operation of the BIOS based on the notification signal, the SP sends a copy of the failover backup image to the BIOS chip of the host computer through the SPI to replace a current BIOS image stored in the BIOS chip of the host computer with the copy of the failover backup image.

Abstract: Certain aspects direct to basic input/output system (BIOS) failover update with a service processor (SP). In certain embodiments, the system includes a host computer and a SP. A CPU of the host computer loads and executes a current BIOS image stored in a BIOS chip to a memory as a BIOS instance. The SP receives, from the executed BIOS instance at the host computer, a BIOS image as a failover backup image, and stores the failover backup image in the volatile memory of the SP. When an error occurs at the host computer, the executed BIOS instance sends a request for the failover backup image to the SP. In response, the SP sends a copy of the failover backup image to the host computer such that the executed BIOS instance may replace the current BIOS image stored in the BIOS chip with the copy of the failover backup image.