Patents by Inventor Purva Prabhu

Purva Prabhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967965
    Abstract: Clock generation circuit generating multiple divided signals satisfying respective desired offsets. A phase locked loop (PLL) is used to generate a PLL output having a frequency which is a desired multiple of that of a reference clock. The circuit divides the PLL output by a corresponding divisor to generate a corresponding divided signal, wherein each divided signal is offset from a common reference by at least an associated desired time offset. The common reference is timed with respect to the reference clock when the reference clock is available and with respect to a time reference signal otherwise. This arrangement is extended to use the internal time reference signal even for the cases where the reference clock is present by blocking the reference clock while the output systems across PLLs are aligned using the internal time reference signal to ensure desired offsets across different PLLs with a small uncertainty.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Shaoxing Yuanfang Semiconductor Co., Ltd.
    Inventors: Raja Prabhu J, Ankit Seedher, Srinath Sridharan, Rakesh Kumar Gupta, Nitesh Naidu, Shivam Agrawal, Jeevabharathi G, Purva Choudhary
  • Patent number: 11923864
    Abstract: A phase-locked loop (PLL) is implemented to have another (second) PLL in place of the controlled oscillator. When a known frequency change in the frequency of the output clock is desired, in addition to changing a configuration of the PLL (first PLL), the configuration of the second PLL is also changed to cause the frequency of the output clock to change quickly. In various embodiments, the configuration of the second PLL is changed by changing the divisor of the feedback divider of the second PLL, the divisor in a pre-scaler in the second PLL, the control voltage of a VCO used in the second PLL, and any other point of user control in the second PLL.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: March 5, 2024
    Assignee: Shaoxing Yuanfang Semiconductor Co., Ltd.
    Inventors: Srinath Sridharan, Ankit Seedher, Raja Prabhu J, Purva Choudhary, Sandeep Sasi, Akash Gupta, Jeevabharathi G
  • Patent number: 7592277
    Abstract: An apparatus and method in which the apparatus includes a first electrospinning device configured to electrospin first fibers of a first substance, a second electrospinning device configured to electrospin second fibers of a second substance such that first and second fibers combine in a mat formation region, and a biasing device configured to bias the first electrospinning device with a first electric polarity and to bias the second electrospinning device with a second electric polarity of opposite polarity to the first electric polarity to promote attraction and coalescence between the first and second fibers. The method electrospins under the first electric polarity first fibers from the first substance, electrospins under the second electric polarity fibers from the second substance, and coalesces the first and second fibers to form the fiber mat.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: September 22, 2009
    Assignee: Research Triangle Institute
    Inventors: Anthony L. Andrady, David S. Ensor, Teri A. Walker, Purva Prabhu
  • Publication number: 20060264140
    Abstract: An apparatus and method in which the apparatus includes a first electrospinning device configured to electrospin first fibers of a first substance, a second electrospinning device configured to electrospin second fibers of a second substance such that first and second fibers combine in a mat formation region, and a biasing device configured to bias the first electrospinning device with a first electric polarity and to bias the second electrospinning device with a second electric polarity of opposite polarity to the first electric polarity to promote attraction and coalescence between the first and second fibers. The method electrospins under the first electric polarity first fibers from the first substance, electrospins under the second electric polarity fibers from the second substance, and coalesces the first and second fibers to form the fiber mat.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 23, 2006
    Applicant: Research Triangle Institute
    Inventors: Anthony Andrady, David Ensor, Teri Walker, Purva Prabhu