Patents by Inventor Pushkin Raj Pari

Pushkin Raj Pari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12366905
    Abstract: The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.
    Type: Grant
    Filed: June 22, 2023
    Date of Patent: July 22, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Sagar Koorapati, Vinod Chamarty, Gaurav Sanjeev Kirtane, Pushkin Raj Pari, Nitin Makhija, Alon Naveh
  • Patent number: 12287688
    Abstract: The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.
    Type: Grant
    Filed: April 1, 2024
    Date of Patent: April 29, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Sagar Koorapati, Vinod Chamarty, Gaurav Sanjeev Kirtane, Pushkin Raj Pari, Nitin Makhija, Alon Naveh
  • Publication number: 20240427400
    Abstract: The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.
    Type: Application
    Filed: April 1, 2024
    Publication date: December 26, 2024
    Inventors: Sagar Koorapati, Vinod Chamarty, Gaurav Sanjeev Kirtane, Pushkin Raj Pari, Nitin Makhija, Alon Naveh
  • Publication number: 20240427397
    Abstract: The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.
    Type: Application
    Filed: June 22, 2023
    Publication date: December 26, 2024
    Inventors: Sagar Koorapati, Vinod Chamarty, Gaurav Sanjeev Kirtane, Pushkin Raj Pari, Nitin Makhija, Alon Naveh