Patents by Inventor Pwu-Yueh Chung

Pwu-Yueh Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Capacity dividable memory IC
    Patent number: 7190604
    Abstract: Two memory areas on a wafer are coupled through pass transistors to double the memory capacity of each area and can be sawed to yield two memory chips each with single memory area. A pair of pass transistors are used to couple each dedicated functional pad in both memory areas, when the pass transistors are turned on. The connection between the pass transistor pair can be sawed through to yield single capacity memory dice. The memory capacity can be further increased by coupling more memory areas together with pass transistors.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: March 13, 2007
    Assignee: Lyontek Inc.
    Inventors: Chi-Cheng Hung, Ling-Yueh Chang, Pwu-Yueh Chung
  • Capacity dividable memory IC
    Publication number: 20060291264
    Abstract: Two memory areas on a wafer are coupled through pass transistors to double the memory capacity of each area and can be sawed to yield two memory chips each with single memory area. A pair of pass transistors are used to couple each dedicated functional pad in both memory areas, when the pass transistors are turned on. The connection between the pass transistor pair can be sawed through to yield single capacity memory dice. The memory capacity can be further increased by coupling more memory areas together with pass transistors.
    Type: Application
    Filed: June 27, 2005
    Publication date: December 28, 2006
    Inventors: Chi-Cheng Hung, Ling-Yueh Chang, Pwu-Yueh Chung
  • Flexible capacity memory IC
    Publication number: 20060285419
    Abstract: More than one memory areas are connected in parallel to increase the memory capacity when activated. The different memory area in a single unit die is activated by a selector pad which controls a single-pole, double throw switch to enable or disable the different memory areas. The corresponding pads of like memory areas are interconnected.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 21, 2006
    Inventors: Chi-Cheng Hung, Ling-Yueh Chang, Pwu-Yueh Chung