Patents by Inventor Pyung Hwa HAN
Pyung Hwa HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11189567Abstract: A semiconductor package includes: a connection structure having first and second surfaces opposing each other and including a redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection structure, encapsulating the semiconductor chip, and including an opaque or translucent resin; a mark indicating identification information and carved in the encapsulant; and a passivation layer disposed on the encapsulant and including a transparent resin.Type: GrantFiled: September 24, 2019Date of Patent: November 30, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Pyung Hwa Han, Jung Soo Kim, Won Choi, Sung Hawn Bae
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Patent number: 11094660Abstract: A semiconductor package includes: a connection structure having first and second surfaces opposing each other and including a redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; a passivation layer disposed on the second surface of the connection structure and having a plurality of first and second openings exposing, respectively, first and second regions of the redistribution layer; and a plurality of underbump metal layers connected to the first region of the redistribution layer through the plurality of first openings, respectively.Type: GrantFiled: September 4, 2019Date of Patent: August 17, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung Soo Kim, Pyung Hwa Han, Sung Hawn Bae, Jin Won Lee
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Patent number: 10825778Abstract: A semiconductor package includes: a connection member having a first surface and a second surface opposing each other, and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection member and having connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip; a wiring structure connected to the first redistribution layer and extending in a thickness direction of the encapsulant; a second redistribution layer disposed on the encapsulant and connected to the wiring structure; and a mark disposed on the encapsulant and including a plurality of metal patterns providing identification information and a circuit line connected to the second redistribution layer.Type: GrantFiled: April 1, 2019Date of Patent: November 3, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Hawn Bae, Pyung Hwa Han, Jung Soo Kim
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Publication number: 20200118959Abstract: A semiconductor package includes: a connection structure having first and second surfaces opposing each other and including a redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; a passivation layer disposed on the second surface of the connection structure and having a plurality of first and second openings exposing, respectively, first and second regions of the redistribution layer; and a plurality of underbump metal bumps connected to the first region of the redistribution layer through the plurality of first openings, respectively.Type: ApplicationFiled: September 4, 2019Publication date: April 16, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung Soo KIM, Pyung Hwa HAN, Sung Hawn BAE, Jin Won LEE
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Publication number: 20200111742Abstract: A semiconductor package includes: a connection structure having first and second surfaces opposing each other and including a redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection structure, encapsulating the semiconductor chip, and including an opaque or translucent resin; a mark indicating identification information and carved in the encapsulant; and a passivation layer disposed on the encapsulant and including a transparent resin.Type: ApplicationFiled: September 24, 2019Publication date: April 9, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Pyung Hwa HAN, Jung Soo Kim, Won Choi, Sung Hawn Bae
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Publication number: 20200105679Abstract: A semiconductor package includes: a connection member having a first surface and a second surface opposing each other, and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection member and having connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip; a wiring structure connected to the first redistribution layer and extending in a thickness direction of the encapsulant; a second redistribution layer disposed on the encapsulant and connected to the wiring structure; and a mark disposed on the encapsulant and including a plurality of metal patterns providing identification information and a circuit line connected to the second redistribution layer.Type: ApplicationFiled: April 1, 2019Publication date: April 2, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Hawn Bae, Pyung Hwa Han, Jung Soo Kim
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Patent number: 10515916Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.Type: GrantFiled: July 2, 2018Date of Patent: December 24, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dae Jung Byun, Byung Ho Kim, Pyung Hwa Han, Joo Young Choi, Ung Hui Shin
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Patent number: 10157868Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.Type: GrantFiled: May 15, 2017Date of Patent: December 18, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Jung Byun, Byung Ho Kim, Pyung Hwa Han, Joo Young Choi, Ung Hui Shin
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Publication number: 20180308815Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.Type: ApplicationFiled: July 2, 2018Publication date: October 25, 2018Inventors: Dae Jung Byun, Byung Ho Kim, Pyung Hwa Han, Joo Young Choi, Ung Hui Shin
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Publication number: 20180061795Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.Type: ApplicationFiled: May 15, 2017Publication date: March 1, 2018Inventors: Dae Jung BYUN, Byung Ho KIM, Pyung Hwa HAN, Joo Young CHOI, Ung Hui SHIN