Abstract: A substrate handling system includes a fixed deposition ring having a plurality of circumferentially spaced notches along an outer edge of the fixed deposition ring, the fixed deposition ring being electrically non-conductive; a moving deposition ring having a plurality of circumferentially spaced recesses formed on a lower surface of the moving deposition ring, the recesses configured to radially align with the notches of the fixed deposition ring, the moving deposition ring having an inner edge and an outer edge, the moving deposition ring being electrically non-conductive; and a plurality of electrically conductive grounding plates each having a base, an intermediate member, and a contact extending from the intermediate member and being spaced from the base, the intermediate members configured to be received in the recesses and extend between the inner edge and the outer edge of the moving deposition ring.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to via structures and via patterning using oblique angle deposition processes. The method includes: depositing a material on a lower wiring layer; forming one or more openings in the material; filling the one or more openings with a conductive material; growing via structures on the conductive material; forming interlevel dielectric material on the via structures; and forming an upper wiring layer on the interlevel dielectric material and in contact with the via structures.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to via structures and via patterning using oblique angle deposition processes. The method includes: depositing a material on a lower wiring layer; forming one or more openings in the material; filling the one or more openings with a conductive material; growing via structures on the conductive material; forming interlevel dielectric material on the via structures; and forming an upper wiring layer on the interlevel dielectric material and in contact with the via structures.

Abstract: Embodiments of the disclosure provide a substrate structure for an integrated circuit (IC) structure, including: a first dielectric layer positioned above a semiconductor substrate; a first plurality of trenches extending at least partially into the first dielectric layer from an upper surface of the first dielectric layer; and a first metal formed within the first plurality of trenches, wherein a spatial arrangement of the first plurality of trenches causes coupling of surface plasmons in the first metal to at least one wavelength of an incident light.

Abstract: Embodiments of the disclosure provide a substrate structure for an integrated circuit (IC) structure, including: a first dielectric layer positioned above a semiconductor substrate; a first plurality of trenches extending at least partially into the first dielectric layer from an upper surface of the first dielectric layer; and a first metal formed within the first plurality of trenches, wherein a spatial arrangement of the first plurality of trenches causes coupling of surface plasmons in the first metal to at least one wavelength of an incident light.