Patents by Inventor Qi Liang MA

Qi Liang MA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing a semiconductor structure by forming a mask layer using side wall spacers as an alignment mark
    Patent number: 11587836
    Abstract: A semiconductor structure and its fabrication method are provided in the present disclosure. The method includes providing a layer to-be-etched, including first regions and second regions. The method further includes forming a plurality of discrete first sacrificial layers on the layer to-be-etched, where a plurality of openings is between the plurality of first sacrificial layers and includes first openings on the first regions. The method further includes forming initial sidewall spacer structures on sidewalls of the plurality of first sacrificial layers, where the initial sidewall spacer structures include first sidewall spacers, and the first sidewall spacers fill the first openings. The method further includes, using the first sidewall spacers as an alignment mark, forming a first mask layer on the layer to-be-etched and the initial sidewall spacer structures, where the first mask layer exposes a portion of the layer to-be-etched and a portion of the initial sidewall spacer structures.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: February 21, 2023
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Song Bai, Qi Liang Ma, Tao Song, Xuan Li
  • SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
    Publication number: 20210090960
    Abstract: A semiconductor structure and its fabrication method are provided in the present disclosure. The method includes providing a layer to-be-etched, including first regions and second regions. The method further includes forming a plurality of discrete first sacrificial layers on the layer to-be-etched, where a plurality of openings is between the plurality of first sacrificial layers and includes first openings on the first regions. The method further includes forming initial sidewall spacer structures on sidewalls of the plurality of first sacrificial layers, where the initial sidewall spacer structures include first sidewall spacers, and the first sidewall spacers fill the first openings. The method further includes, using the first sidewall spacers as an alignment mark, forming a first mask layer on the layer to-be-etched and the initial sidewall spacer structures, where the first mask layer exposes a portion of the layer to-be-etched and a portion of the initial sidewall spacer structures.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 25, 2021
    Inventors: Song BAI, Qi Liang MA, Tao SONG, Xuan LI