Patents by Inventor Qi Ye
Qi Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12632247Abstract: Automatic redeploying/upgrade of containers on multiple nodes using an Automated Deployment Software (ADS) having an Automated Deployment Tool (ADT) includes updating the ADS with a planned patch of a target layer, introducing a patchname sync command into the ADT to introduce a required patch type/specific patch and redeploy the containers, updating the ADT with a Producer Module (PM) and a Consumer Module (CM), running the ADT to cause the PM to update an image manifest item attribute, and push the image manifest item/new layer to a repository and running the ADT to cause the CM to read the image manifest item, identify and pull the unimpacted layers, and performing at least one of deploying/upgrading an application, or waiting for an available patch fix and deploying/upgrading the application.Type: GrantFiled: May 23, 2024Date of Patent: May 19, 2026Assignee: International Business Machines CorporationInventors: Xiao Ling Chen, Juliet Candee, Heng Wang, Qi Ye
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Publication number: 20260095159Abstract: A flip-flop circuit includes a first data path configured to provide a first path inverted value of an input signal to an output node of the flip-flop circuit based on a clock pulse. The flip-flop circuit also includes a second data path configured to provide a second path inverted value of the input signal to the output node via a master latch circuit and a slave latch circuit, based on a clock signal.Type: ApplicationFiled: December 19, 2024Publication date: April 2, 2026Inventors: VIVEKANANDAN VENUGOPAL, QI YE, RAJIV MITTAL
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Patent number: 12574209Abstract: Data protection using portable data structures includes packaging ciphertext blocks into portable data structures, the ciphertext blocks being produced based on encryption of plaintext blocks according to a block encryption mode that includes dependencies between cryptographic processing of the plaintext blocks, the dependencies including decryption of a first ciphertext block being dependent on a second ciphertext block or decryption processing of the second ciphertext block, the packaging including providing, for each ciphertext block that has a dependency on another ciphertext block, an associated dependency label in the portable data structure in which the ciphertext block is packaged, and distributing the portable data structures to nodes such that portable data structures, of the portable data structures, that package ciphertext blocks between which at least one dependency exists are distributed to different nodes of the nodes.Type: GrantFiled: December 16, 2022Date of Patent: March 10, 2026Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Heng Wang, Ming Zhe Jiang, Jun Long Xiang, Jian Guo Liu, Qi Ye, Xiao Ling Chen
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Patent number: 12561229Abstract: A computer implemented method for debugging computer instructions is provided. The method comprises using a number processors to receive a computer program, including a source code and generate a number of information records associated with a number of computer instructions in the source code, wherein at least one of the computer instructions comprises a function enclosed by a macro. The processors create a data structure based on the information records and generate an index of identifiers in the data structure based on debug information of the computer instructions, wherein the index comprises respective identifying entries for the computer instructions. The processors update information records according to the identifying entries in the data structure.Type: GrantFiled: August 22, 2022Date of Patent: February 24, 2026Assignee: International Business Machines CorporationInventors: Xiao Ling Chen, Qi Ye, Heng Wang, Qi Li, Navya Ramanjulu
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Publication number: 20250362899Abstract: Automatic redeploying/upgrade of containers on multiple nodes using an Automated Deployment Software (ADS) having an Automated Deployment Tool (ADT) includes updating the ADS with a planned patch of a target layer, introducing a patchname sync command into the ADT to introduce a required patch type/specific patch and redeploy the containers, updating the ADT with a Producer Module (PM) and a Consumer Module (CM), running the ADT to cause the PM to update an image manifest item attribute, and push the image manifest item/new layer to a repository and running the ADT to cause the CM to read the image manifest item, identify and pull the unimpacted layers, and performing at least one of deploying/upgrading an application, or waiting for an available patch fix and deploying/upgrading the application.Type: ApplicationFiled: May 23, 2024Publication date: November 27, 2025Inventors: Xiao Ling Chen, Juliet Candee, Heng Wang, Qi Ye
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Patent number: 12444492Abstract: The present invention provides a medical image segmentation method based on a Boosting-Unet segmentation network. By dividing training of an overall segmentation network into training of m sub segmentation networks, the method inherits convolution kernel parameters of the (k?1)th sub segmentation network during training of the kth sub segmentation network, thereby greatly decreasing the quantity of the convolution kernel parameters during every training and improving the learning ability of the network and the resistance to noise and image blur. In addition, a plurality of sub segmentation networks are arranged, so that the efficiency of the network is improved, a depth of an image data feature is also extracted, and the image data is segmented precisely, thereby improving the learning ability of the overall segmentation network to the image data feature, enhancing the robustness to noise disturbance information and further improving the performance of image segmentation.Type: GrantFiled: March 14, 2023Date of Patent: October 14, 2025Assignee: SOUTH CHINA NORMAL UNIVERSITYInventors: Qi Ye, Lihui Wen, Jiawei Chen, Chihua Fang
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Publication number: 20250190878Abstract: A cross-domain recommendation model training method includes: constructing a heterogeneous network, the heterogeneous network including a node bipartite graph between sample source-domain content nodes and sample target-domain content nodes, a first label bipartite graph between the sample source-domain content nodes and sample source-domain semantic labels, and a second label bipartite graph between the sample target-domain content node and sample target-domain semantic labels; generating a training sample based on a sample source-domain content node and a sample target-domain content node between which a connecting edge exists in the node bipartite graph, a sample source-domain semantic label corresponding to the sample source-domain content node in the first label bipartite graph, and a sample target-domain semantic label corresponding to the sample target-domain content node in the second label bipartite graph; and training a cross-domain recommendation model based on the training sample.Type: ApplicationFiled: February 17, 2025Publication date: June 12, 2025Inventors: Qi YE, Feng WANG, Zhiyong ZHENG
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Patent number: 12289476Abstract: A method may include obtaining parameter information of a plurality of acquisition devices that communicate with the system to transmit video data to the system. The parameter information of each of the plurality of acquisition device may include transmission information of a target key frame of the video data of the acquisition device. The method may also include determining, based on the parameter information, whether there are collision key frames in the target key frames of the plurality of acquisition devices. The method may also include adjusting an original generation time of at least one of the collision key frames in response to determining that there are collision key frames, so that after the adjustment, there is no collision key frame in the target key frames of the plurality of acquisition devices.Type: GrantFiled: March 30, 2023Date of Patent: April 29, 2025Assignee: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.Inventors: Jinyu Zhang, Fei Wang, Xiang Li, Zhiji Deng, Ming Liu, Qi Ye, Yongjun Fang
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Publication number: 20240204986Abstract: Data protection using portable data structures includes packaging ciphertext blocks into portable data structures, the ciphertext blocks being produced based on encryption of plaintext blocks according to a block encryption mode that includes dependencies between cryptographic processing of the plaintext blocks, the dependencies including decryption of a first ciphertext block being dependent on a second ciphertext block or decryption processing of the second ciphertext block, the packaging including providing, for each ciphertext block that has a dependency on another ciphertext block, an associated dependency label in the portable data structure in which the ciphertext block is packaged, and distributing the portable data structures to nodes such that portable data structures, of the portable data structures, that package ciphertext blocks between which at least one dependency exists are distributed to different nodes of the nodes.Type: ApplicationFiled: December 16, 2022Publication date: June 20, 2024Inventors: Heng Wang, Ming Zhe Jiang, Jun Long Xiang, Jian Guo Liu, Qi Ye, Xiao Ling Chen
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Publication number: 20240104419Abstract: A method, computer system, and a computer program product for data compression is provided. The present invention may include receiving operational data. The present invention may include profiling the operational data using one or more normalizing functions. The present invention may include extracting a plurality of patterns from the operational data. The present invention may include compressing the operational data based on the plurality of patterns extracted.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: FAN JING Meng, Cheng Luo, Qi Ye, Jia Tian Zhong
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Publication number: 20240070372Abstract: A quantum layout optimization method includes: determining target Hamiltonian parameters of a quantum device; determining an initial quantum layout of the quantum device and initial geometric parameters of the initial quantum layout; determining a target gradient of Hamiltonian parameters of the quantum device to geometric parameters of the initial quantum layout; and adjusting the initial geometric parameters based on the target gradient to have the Hamiltonian parameters of the quantum device be the target Hamiltonian parameters to obtain a target quantum layout.Type: ApplicationFiled: July 13, 2023Publication date: February 29, 2024Inventors: Tian XIA, Feng WU, Jianjun CHEN, Xiaotong NI, Qi YE, Huihai ZHAO
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Publication number: 20240061764Abstract: A computer implemented method for debugging computer instructions is provided. The method comprises using a number processors to receive a computer program, including a source code and generate a number of information records associated with a number of computer instructions in the source code, wherein at least one of the computer instructions comprises a function enclosed by a macro. The processors create a data structure based on the information records and generate an index of identifiers in the data structure based on debug information of the computer instructions, wherein the index comprises respective identifying entries for the computer instructions. The processors update information records according to the identifying entries in the data structure.Type: ApplicationFiled: August 22, 2022Publication date: February 22, 2024Inventors: Xiao Ling Chen, Qi Ye, Heng Wang, Qi Li, Navya Ramanjulu
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Publication number: 20230368896Abstract: The present invention provides a medical image segmentation method based on a Boosting-Unet segmentation network. By dividing training of an overall segmentation network into training of m sub segmentation networks, the method inherits convolution kernel parameters of the (k?1)th sub segmentation network during training of the kth sub segmentation network, thereby greatly decreasing the quantity of the convolution kernel parameters during every training and improving the learning ability of the network and the resistance to noise and image blur. In addition, a plurality of sub segmentation networks are arranged, so that the efficiency of the network is improved, a depth of an image data feature is also extracted, and the image data is segmented precisely, thereby improving the learning ability of the overall segmentation network to the image data feature, enhancing the robustness to noise disturbance information and further improving the performance of image segmentation.Type: ApplicationFiled: March 14, 2023Publication date: November 16, 2023Applicant: SOUTH CHINA NORMAL UNIVERSITYInventors: Qi YE, Lihui WEN, Jiawei CHEN, Chihua FANG
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Publication number: 20230262266Abstract: A method may include obtaining parameter information of a plurality of acquisition devices that communicate with the system to transmit video data to the system. The parameter information of each of the plurality of acquisition device may include transmission information of a target key frame of the video data of the acquisition device. The method may also include determining, based on the parameter information, whether there are collision key frames in the target key frames of the plurality of acquisition devices. The method may also include adjusting an original generation time of at least one of the collision key frames in response to determining that there are collision key frames, so that after the adjustment, there is no collision key frame in the target key frames of the plurality of acquisition devices.Type: ApplicationFiled: March 30, 2023Publication date: August 17, 2023Applicant: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.Inventors: Jinyu ZHANG, Fei WANG, Xiang LI, Zhiji DENG, Ming LIU, Qi YE, Yongjun FANG
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Patent number: 11693759Abstract: Methods, computer program products, and/or systems are provided that perform the following operations: determining that a log multi-process debug mode is specified; obtaining a log file for debugging a source code, wherein the log file includes a plurality of log records; inserting a plurality of process identifier fields into each current log record in the log file; inserting a new log record into the log file for a created new process; and providing for performance of debugging for the source code based in part on the plurality of process identifier fields inserted into each current log record.Type: GrantFiled: May 14, 2021Date of Patent: July 4, 2023Assignee: International Business Machines CorporationInventors: Xiao Ling Chen, Qi Ye, Wen Ji Huang, Heng Wang, Kui Zhang
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Publication number: 20220365865Abstract: Methods, computer program products, and/or systems are provided that perform the following operations: determining that a log multi-process debug mode is specified; obtaining a log file for debugging a source code, wherein the log file includes a plurality of log records; inserting a plurality of process identifier fields into each current log record in the log file; inserting a new log record into the log file for a created new process; and providing for performance of debugging for the source code based in part on the plurality of process identifier fields inserted into each current log record.Type: ApplicationFiled: May 14, 2021Publication date: November 17, 2022Inventors: Xiao Ling Chen, Qi Ye, Wen Ji Huang, Heng Wang, Kui Zhang
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Patent number: 11496120Abstract: A flip-flop with glitch protection is disclosed. The flip-flop includes a differential amplifier circuit that generates amplifier output signals based on an input data and clock signals and precharges a true data node when a clock signal is inactive. A latch circuit is coupled to the differential amplifier and includes a latch node. Responsive to a current value of the input data signal having a first logic state, the latch node is set at a logic value equivalent to the precharged value during an active phase of the clock signal. Responsive to the current value of the input data signal having a second logic state complementary to the first, during the active phase of the clock signal, the latch circuit causes the latch node to be set to a logic value complementary to the precharged value, using the clock signal and the current value of the input data signal.Type: GrantFiled: January 15, 2021Date of Patent: November 8, 2022Assignee: Apple Inc.Inventors: Qi Ye, Ajay Bhatia, Vivekanandan Venugopal
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Patent number: 11424734Abstract: Systems, apparatuses, and methods for implementing low voltage clock swing sequential circuits are described. An input signal is coupled to the gates of a first P-type transistor and a first N-type transistor of a first transistor stack. A low voltage swing clock signal is coupled to the gate of a second N-type transistor of the first transistor stack. An inverse of the input signal is coupled to the gates of a second P-type transistor and a third N-type transistor of a second transistor stack. The low-swing clock is coupled to the gate of a fourth N-type transistor of the second transistor stack. A first end of one or more enabling P-Type transistors with gates coupled to the low-swing clock is coupled to the first P-type transistor's drain, and a second end of the one or more enabling P-Type transistors is coupled to the second P-type transistor's drain.Type: GrantFiled: May 21, 2021Date of Patent: August 23, 2022Assignee: Apple Inc.Inventors: Vivekanandan Venugopal, Ajay Bhatia, Qi Ye
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Publication number: 20220231673Abstract: A flip-flop with glitch protection is disclosed. The flip-flop includes a differential amplifier circuit that generates amplifier output signals based on an input data and clock signals and precharges a true data node when a clock signal is inactive. A latch circuit is coupled to the differential amplifier and includes a latch node. Responsive to a current value of the input data signal having a first logic state, the latch node is set at a logic value equivalent to the precharged value during an active phase of the clock signal. Responsive to the current value of the input data signal having a second logic state complementary to the first, during the active phase of the clock signal, the latch circuit causes the latch node to be set to a logic value complementary to the precharged value, using the clock signal and the current value of the input data signal.Type: ApplicationFiled: January 15, 2021Publication date: July 21, 2022Inventors: Qi Ye, Ajay Bhatia, Vivekanandan Venugopal
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Patent number: 11336272Abstract: Systems, apparatuses, and methods for implementing a low-power, single-pin retention flip-flop with a balloon latch are described. A flip-flop is connected to a retention latch to store a value of the flip-flop during a reduced power state. A single retention pin is used to turn on the retention latch. During normal mode, the retention latch is pre-charged and a change in the value stored by the flip-flop does not cause the retention latch to toggle. This helps to reduce the power consumed by the circuit during normal mode (i.e., non-retention mode). When the retention signal becomes active, the retention latch gets triggered and the value stored by the flip-flop is written into the retention latch. Later, if the flip-flop is powered down and then powered back up while the circuit is in retention mode, the value in the retention latch gets written back into the flip-flop.Type: GrantFiled: September 22, 2020Date of Patent: May 17, 2022Assignee: Apple Inc.Inventors: Vivekanandan Venugopal, Qi Ye