Patents by Inventor Qi Ziang

Qi Ziang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6673696
    Abstract: A method of manufacturing an integrated circuit (IC) utilizes a shallow trench isolation (STI) technique. The shallow trench isolation technique is used in strained silicon (SMOS) process. The liner for the trench is formed in a high temperature process after the trench is filled with an insulative material. The insulative material is provided in a low temperature process.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: January 6, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Farzad Arasnia, Minh-Van Ngo, Qi Ziang