Patents by Inventor Qian Fu
Qian Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250069895Abstract: Exemplary semiconductor processing methods may include providing a fluorine-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. A layer of a silicon-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor. The contacting may etch a feature in the layer of silicon-containing material. A substrate support pedestal temperature may be maintained at less than or about ?20° C. during the semiconductor processing method.Type: ApplicationFiled: August 21, 2023Publication date: February 27, 2025Applicant: Applied Materials, Inc.Inventors: Anatoli Chlenov, Kenji Takeshita, Alok Ranjan, Qian Fu, Hikaru Watanabe, Akhil Mehrotra, Lei Liao, Zhonghua Yao, Sonam Dorje Sherpa
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Publication number: 20250062131Abstract: Methods of semiconductor processing may include forming plasma effluents of a plurality of precursors (e.g., an etchant precursor, an oxygen-containing precursor, and a silicon-and-fluorine-containing precursor like silicon tetrafluoride). The plasma effluents may then contact a silicon-containing material and a mask material on a substrate in a processing region of a semiconductor processing chamber. The mask material may have one or more apertures therein that allow the plasma effluents access to the silicon-containing material. Contacting the silicon-containing material and the mask material with the plasma effluents may cause (i) etching the silicon-containing material with the plasma effluents to form and/or deepen one or more features in the silicon-containing material and (ii) simultaneously etching the mask material and depositing a silicon-and-oxygen-containing material on the mask material with the plasma effluents.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Applicant: Applied Materials, Inc.Inventors: Hanbyul Jin, Sangjun Park, Menghui Li, Xiawan Yang, Sunil Srinivasan, Meishen Liu, Andrew Butler, Qian Fu
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Publication number: 20250054768Abstract: Exemplary semiconductor processing methods may include providing an oxygen-containing precursor and a sulfur-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. A layer of carbon-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the oxygen-containing precursor and the sulfur-containing precursor. The methods may include contacting the substrate with the plasma effluents of the oxygen-containing precursor and the sulfur-containing precursor. The contacting may etch a feature in the layer of carbon-containing material. A chamber operating temperature may be maintained at less than or about 0° C.Type: ApplicationFiled: August 11, 2023Publication date: February 13, 2025Applicant: Applied Materials, Inc.Inventors: Jiajing Li, Mengjie Lyu, Menghui Li, Xiawan Yang, Olivier P. Joubert, Susumu Shinohara, Qian Fu
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Publication number: 20250054770Abstract: Exemplary semiconductor processing methods may include providing a fluorine-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. A layer of oxygen-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the fluorine-containing precursor and the carbon-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor and the carbon-containing precursor. The contacting may etch a feature in the layer of oxygen-containing material. A semiconductor processing chamber operating temperature may be maintained at less than or about 0° C. during the semiconductor processing method.Type: ApplicationFiled: August 11, 2023Publication date: February 13, 2025Applicant: Applied Materials, Inc.Inventors: Jiajing Li, Mengjie Lyu, Menghui Li, Xiawan Yang, Olivier P. Joubert, Susumu Shinohara, Qian Fu
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Patent number: 12198928Abstract: Exemplary semiconductor processing methods may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may define one or more recessed features. The methods may include providing a second precursor to the processing region. The methods may include forming a plasma of the carbon-containing precursor and the second precursor in the processing region. Forming the plasma of the carbon-containing precursor and the second precursor may be performed at a plasma power of greater than or about 500 W. The methods may include depositing a carbon-containing material on the substrate. The carbon-containing material may extend within the one or more recessed features. The methods may include, subsequent depositing the carbon-containing material for a first period of time, applying a bias power while depositing the carbon-containing material for a second period of time.Type: GrantFiled: October 22, 2021Date of Patent: January 14, 2025Assignee: Applied Materials, Inc.Inventors: Abhijeet S. Bagal, Qian Fu
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Publication number: 20240420948Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.Type: ApplicationFiled: August 27, 2024Publication date: December 19, 2024Applicant: Applied Materials, Inc.Inventors: Abhijeet S. Bagal, Qian Fu, Kuan-Ting Liu, Chung Liu
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Patent number: 12165872Abstract: A substrate is disposed on a substrate holder within a process module. The substrate includes a mask material overlying a target material with at least one portion of the target material exposed through an opening in the mask material. A plasma is generated in exposure to the substrate. For a first duration, a bias voltage is applied at the substrate holder at a first bias voltage setting corresponding to a high bias voltage level. For a second duration, after completion of the first duration, a bias voltage is applied at the substrate holder at a second bias voltage setting corresponding to a low bias voltage level. The second bias voltage setting is greater than 0 V. The first and second durations are repeated in an alternating and successive manner for an overall period of time necessary to remove a required amount of the target material exposed on the substrate.Type: GrantFiled: March 9, 2021Date of Patent: December 10, 2024Assignee: Lam Research CorporationInventors: Zhongkui Tan, Qian Fu, Ying Wu, Qing Xu, John Drewery
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Publication number: 20240404837Abstract: Methods of semiconductor processing may include providing a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed on a substrate support within the processing region. A layer of silicon-and-nitrogen-containing material may be disposed on the substrate. The methods may include forming plasma effluents of the hydrogen-containing precursor. The methods may include contacting the layer of silicon-and-nitrogen-containing material with plasma effluents of the hydrogen-containing precursor. The contacting may etch a portion of the layer of silicon-and-nitrogen-containing material.Type: ApplicationFiled: May 30, 2023Publication date: December 5, 2024Applicant: Applied Materials, Inc.Inventors: Zhiren Luo, Jeong Hwan Kim, Qian Fu, Abhijeet S. Bagal
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Patent number: 12148475Abstract: Described is a memory string including at least one select gate for drain (SGD) transistor and at least one memory transistor in a vertical hole extending through a memory stack on a substrate. The memory stack comprises alternating word lines and dielectric material. There is at least one select-gate-for-drain (SGD) transistor in a first vertical hole extending through the memory stack, the select-gate-for-drain (SGD) transistor comprising a first gate material. At least one memory transistor is in a second vertical hole extending through the memory stack, the at least one memory transistor comprising a second gate material different from the first gate material.Type: GrantFiled: March 28, 2022Date of Patent: November 19, 2024Assignee: Applied Materials, Inc.Inventors: Chang Seok Kang, Tomohiko Kitajima, Gill Yong Lee, Qian Fu, Sung-Kwan Kang, Takehito Koshizawa, Fredrick Fishburn
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Patent number: 12125699Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.Type: GrantFiled: June 28, 2021Date of Patent: October 22, 2024Assignee: Applied Materials, Inc.Inventors: Abhijeet S. Bagal, Qian Fu, Kuan-Ting Liu, Chung Liu
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Publication number: 20240332031Abstract: A method and system for etching high aspect ratio structures in a semiconducting processing chamber are disclosed herein. In one example, a method of patterning a substrate comprises etching the substrate to form a recess, depositing a passivation layer on sidewalls of the recess, treating the passivation layer, and etching the recess to a second depth. The substrate etch forms a recess to a first depth, the substrate having a mask layer disposed thereon. The treating of the passivation layer is for removal of a clogging material formed from an etch byproduct on the mask layer. The etching the recess to a second depth while maintaining a minimum variation of a recess sidewall width.Type: ApplicationFiled: March 30, 2023Publication date: October 3, 2024Applicant: Applied Materials, Inc.Inventors: Feng QIAO, Hailong ZHOU, Qian FU, Sangjun PARK, Jayoung CHOI, Radhe AGARWAL, Tong LIU
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Patent number: 12106972Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may include one or more patterned features separated by exposed regions of the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor. Forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor may be performed at a plasma power of less than or about 1,000 W. The methods may include depositing a silicon-containing material on the one or more patterned features along the substrate. The silicon-containing material may be deposited on the patterned features at a rate of at least 2:1 relative to deposition on the exposed regions of the substrate.Type: GrantFiled: October 13, 2021Date of Patent: October 1, 2024Assignee: Applied Materials, Inc.Inventors: Yifeng Zhou, Qian Fu
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Publication number: 20240266180Abstract: A method includes performing a dry etch process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers. The first layer includes a first material and the second layer includes a second material different from the first material, and the dry etch process forms a passivation layer including a byproduct on surfaces of the second material. A amount of first material of the portion of the first layer remains after performing the dry etch process, The method further includes introducing a halide gas to enhance the passivation layer on the surfaces of the second material.Type: ApplicationFiled: February 1, 2024Publication date: August 8, 2024Inventors: David Knapp, Feng Qiao, Hailong Zhou, Junkai He, Qian Fu, Mark J. Saly, Jeffrey Anthis, Jayoung Choi
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Publication number: 20240249953Abstract: Exemplary methods of semiconductor processing may include providing a fluorine-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may include a boron-containing material overlying a carbon-containing material. The methods may include generating plasma effluents of the fluorine-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor. The methods may include removing the boron-containing material from the substrate.Type: ApplicationFiled: January 19, 2023Publication date: July 25, 2024Applicant: Applied Materials, Inc.Inventors: Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Siyu Zhu, Hang Yu, Srinivas Guggilla
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Publication number: 20240242970Abstract: Exemplary methods of semiconductor processing may include providing deposition precursors to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may include a photoresist material overlying a silicon-containing material. The photoresist material may define an aperture. The processing region may be at least partially defined above a substrate support on which the substrate is seated. The methods may include forming plasma effluents of the deposition precursors. The methods may include depositing a material on the photoresist material. The methods may include providing an etchant precursor to the processing region of the semiconductor processing chamber. A bias power may be applied to the substrate support from a bias power source. The methods may include etching a portion of the photoresist material. The etching may decrease a local critical dimension uniformity of the aperture of the photoresist material.Type: ApplicationFiled: January 12, 2023Publication date: July 18, 2024Applicant: Applied Materials, Inc.Inventors: Yifeng Zhou, Zhuangfei Chen, Qian Fu
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Patent number: 12009218Abstract: Described herein is a method for etching a sample. The method includes performing a plasma etch pulse. The plasma etch pulse is performed by directing a gas flow comprising silicon tetrachloride (SiCl4) and a diluent towards the sample. While directing the gas flow, a bias power is applied to achieve a bias state for a first time period. Then, a source power is applied to achieve a source state for a second time period, and then no bias power and no source power is applied to achieve a recovery state for a third time period. The plasma etch pulse is repeated until a target amount of the sample is etched.Type: GrantFiled: May 6, 2022Date of Patent: June 11, 2024Assignee: Applied Materials, Inc.Inventors: Yifeng Zhou, Qian Fu
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Publication number: 20240128091Abstract: A method includes providing, within an etch chamber, a base structure including a target layer disposed on a substrate, and an etch mask disposed on the target layer, dry etching, within the etch chamber, the target layer using thionyl chloride to obtain a processed base structure, and after forming the plurality of features. The processed base structure includes a plurality of features and a plurality of openings defined by the etch mask. The method further includes removing the processed base structure from the etch chamber. In some embodiments, the target layer includes carbon. In some embodiments, the dry etching is performed at a sub-zero degree temperature.Type: ApplicationFiled: July 12, 2023Publication date: April 18, 2024Inventors: Zhonghua Yao, Qian Fu, Mark J. Saly, Yang Yang, Jeffrey W. Anthis, David Knapp, Rajesh Sathiyanarayanan
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Patent number: 11935751Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: GrantFiled: May 25, 2021Date of Patent: March 19, 2024Assignee: Applied Materials, Inc.Inventors: Siyu Zhu, Chuanxi Yang, Hang Yu, Deenesh Padhi, Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Xiawan Yang
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Publication number: 20240038833Abstract: Memory devices and methods of forming memory devices are described. Methods of forming electronic devices are described where carbon is used as the removable mold material for the formation of a DRAM capacitor. A dense, high-temperature (500° C. or greater) PECVD carbon material is used as the removable mold material, e.g., the core material, instead of oxide. The carbon material can be removed by isotropic etching with exposure to radicals of oxygen (O2), nitrogen (N2), hydrogen (H2), ammonia (NH3), and combinations thereof.Type: ApplicationFiled: July 14, 2023Publication date: February 1, 2024Applicant: Applied Materials, Inc.Inventors: Fredrick Fishburn, Tomohiko Kitajima, Qian Fu, Srinivas Guggilla, Hang Yu, Jun Feng, Shih Chung Chen, Lakmal C. Kalutarage, Jayden Potter, Karthik Janakiraman, Deenesh Padhi, Yifeng Zhou, Yufeng Jiang, Sung-Kwan Kang
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Publication number: 20240030000Abstract: Systems and methods for reverse pulsing are described. One of the methods includes receiving a digital signal having a first state and a second state. The method further includes generating a transformer coupled plasma (TCP) radio frequency (RF) pulsed signal having a high state when the digital signal is in the first state and having a low state when the digital signal is in the second state. The method includes providing the TCP RF pulsed signal to one or more coils of a plasma chamber, generating a bias RF pulsed signal having a low state when the digital signal is in the first state and having a high state when the digital signal is in the second state, and providing the bias RF pulsed signal to a chuck of the plasma chamber.Type: ApplicationFiled: October 3, 2023Publication date: January 25, 2024Inventors: Maolin Long, Zhongkui Tan, Ying Wu, Qian Fu, Alex Paterson, John Drewery