Abstract: Power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a controller for a power factor correction circuit may include a comparator, a frequency controller, and a deadtime controller. The controller may be configured to: receive an input signal comprising a measured output voltage of the power factor correction circuit; compare, via the comparator, the measured output voltage with a set point, resulting in a difference between the measured output voltage and the set point; feed the difference into the frequency controller and adjust a frequency of the first and second pulsed signals based on an output of the frequency controller; and provide the difference to the deadtime controller and adjust the deadtime of the first and second pulsed signals based on an output of the deadtime controller.

Abstract: Power converters with power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a power converter may be configured to receive an alternating current (AC) input signal and output a direct current (DC) output signal. The power converter may include a transformer and a power factor correction circuit. The power factor correction circuit may include: a first switching transistor and a second switching transistor in series with the first switching transistor; and a controller configured to generate first and second pulsed signals having respective and complementary phases and separated by an adjustable deadtime and apply the generated first and second pulsed signals to the first and second transistors, respectively. A primary side of the transformer may be coupled to a node between the first and second switching transistors.

Abstract: Power converters with power factor correction circuits and controllers thereof that are configured to generate frequency-adjustable first and second pulsed signals having respective and complementary phases separated by an adjustable deadtime. For example, a power converter may be configured to receive an alternating current (AC) input signal and output a direct current (DC) output signal. The power converter may include at least one DC/DC converter and a power factor correction circuit. The power factor correction circuit may include a first switching transistor comprising a first gate; a second switching transistor in series with the first switching transistor and comprising a second gate; and a controller configured to generate first and second pulsed signals having respective and complementary phases and separated by an adjustable deadtime and apply the generated first and second pulsed signals to the first and second gates, respectively.

Abstract: An AC/DC power converter includes an input port configured to receive an AC power signal, a first transformer coupled to the input port, the first transformer comprising first and second primary windings and at least a first secondary winding, and a second transformer coupled to the input port, the second transformer comprising third and fourth primary windings and at least a second secondary winding. The first primary winding of the first transformer is coupled in series with the third primary winding of the second transformer, the second primary winding of the first transformer is coupled in series with the fourth primary winding of the second transformer, and the first secondary winding and the second secondary winding are coupled in parallel.

Abstract: An AC/DC power converter includes an input port configured to receive an AC power signal, a first transformer coupled to the input port, the first transformer comprising first and second primary windings and at least a first secondary winding, and a second transformer coupled to the input port, the second transformer comprising third and fourth primary windings and at least a second secondary winding. The first primary winding of the first transformer is coupled in series with the third primary winding of the second transformer, the second primary winding of the first transformer is coupled in series with the fourth primary winding of the second transformer, and the first secondary winding and the second secondary winding are coupled in parallel.