Abstract: The present disclosure relates to an interposer substrate, a package structure comprising the interposer substrate, a manufacturing method thereof, and an electrical system. An interposer substrate for a package structure is provided that comprises: an insulating body having one or more holes; one or more coupling members disposed on or in the insulating body; and one or more electronic components comprising a first electronic component disposed in a first hole of the one or more holes and electrically coupled to a corresponding first coupling member of the one or more coupling members, the first electronic component being adaptable to be electrically coupled to other members of the package structure external to the interposer substrate through the first coupling member.

Abstract: The present disclosure relates to intra-cooling devices for power modules, methods for manufacturing same, power modules and electrical systems.

Abstract: The present disclosure relates to power modules, methods for manufacturing same, and electrical systems. A power module is provided, comprising one or more power module units each comprising: an intra-cooling device formed of an insulating material; a first metal layer disposed on a top surface of the intra-cooling device; a first chip attached on the first metal layer, the first chip being electrically coupled by the first metal layer and at least one of a first conductive clip and a first conductive wire attached on the first chip and the first metal layer; a second metal layer disposed on a bottom surface of the intra-cooling device; and a second chip attached on the second metal layer, the second chip being electrically coupled by the second metal layer and at least one of a second conductive clip and a second conductive wire attached on the second chip and the second metal layer.

Abstract: The present disclosure relates to dual-side cooling power modules, manufacturing methods thereof, and electrical systems. There is provided a dual-side cooling power module, comprising: a first multilayer substrate, comprising: a first insulating material layer, a first metal layer, and a second metal layer, the second metal layer comprising a plurality of first step structures having a first height; a second multilayer substrate, comprising: a second insulating material layer, a third metal layer, and a fourth metal layer, the fourth metal layer comprising a plurality of second step structures having a second height; and one or more chips disposed between the first multilayer substrate and the second multilayer substrate and attached to the second metal layer and the fourth metal layer. Each chip is attached and supported between a corresponding first step structure and a corresponding second step structure and is electrically connected with them.

Abstract: The present disclosure relates to a semiconductor device, a manufacturing method thereof, and an electrical system. An example semiconductor comprises: a semiconductor substrate comprising at least one power semiconductor device; an insulating film on the semiconductor substrate having at least one first opening that penetrates through the insulating film, the at least one first opening exposing a corresponding first portion of the semiconductor substrate; at least one conductive attachment component filled in a corresponding first opening of the at least one first opening; and a metal sheet provided on the insulating film and the at least one attachment component, wherein a corresponding portion of the metal sheet is bonded and electrically connected to the corresponding first portion of the semiconductor substrate by the at least one attachment component.

Abstract: An electronic device includes a semiconductor die and a package structure, the semiconductor die having a semiconductor material with a first thermal conductivity, opposite first and second sides, a terminal on the first side, a trench extending into the second side, and a thermally conductive material in the trench, the thermally conductive material having a second thermal conductivity that is greater than the first thermal conductivity, the first side of the semiconductor die facing a lead frame or substrate, the package structure enclosing a portion of the semiconductor die and a portion of the lead frame or substrate, and the package structure exposing a portion of the thermally conductive material along the second side of the semiconductor die.

Abstract: The present disclosure relates to multilayer substrates and methods of manufacturing the same, power modules and methods of manufacturing the same, and electrical systems. The multilayer substrate may comprise an insulating material layer and first and second metal layers attached to the insulating material layer on respective opposite surfaces. The second metal layer comprises: a first portion overlapping the insulating material layer and used for attaching one or more chips thereon; and a second portion extending outwards from the first portion and extending beyond the insulating material layer at least on opposite first and second sides of the second metal layer. The second portion has at least one pair of first notches extending inwards from edges, and each pair of first notches are located at corresponding positions on the first and second sides of the second metal layer, respectively.

Abstract: The present disclosure relates to a multilayer substrate, a power module, and an electrical system. A multilayer substrate is provided that comprises: an insulating material layer including a ceramic material; a first metal layer attached to the insulating material layer on a side of the insulating material layer; and a second metal layer attached to the insulating material layer on an opposite side of the insulating material layer, wherein the insulating material layer is configured as a plurality of segments separated from each other, a first portion of the second metal layer, for attaching a chip thereon, overlapping at least one segment of the insulating material layer.

Abstract: In examples, a semiconductor device comprises a semiconductor package including a mold compound covering a semiconductor die. The semiconductor package has a surface and a cavity formed in the surface. The semiconductor device comprises an electronic device positioned within the cavity, the electronic device coupled to the semiconductor die via a conductive terminal extending through the mold compound.

Abstract: A multilayer printed circuit board for interconnecting pin(s) and semiconductor die(s) is provided. A multilayer printed circuit board for interconnecting pin(s) and semiconductor die(s) comprises a multilayer substrate and pin holder(s), die contact(s), and first interconnection structure(s) embedded in the multilayer substrate. The multilayer substrate comprises a bottom substrate layer, one or more core substrate layers, and a top substrate layer stacked in sequence. and each made of an insulating material. Each of the pin holder(s) has an end exposed from a top surface of the top substrate layer for plugging the pin into the pin holder Each of the die contact(s) has an end exposed from a bottom surface of the bottom substrate layer for being electrically coupled with a contact of the semiconductor die(s) Each of the first interconnection structure(s) is connected between and electrically couples a corresponding pin holder and a corresponding die contact.

Abstract: The present disclosure relates to package, manufacturing method, and electrical system. The package comprises: a mounting substrate with at least one power die having a power device and attached to a first surface of the mounting substrate; and a lead frame comprising a first die attachment portion and at least one first lead, wherein at least one cooperation device die having a cooperation device for cooperating with the power device is attached to the first die attachment portion, and wherein during a normal operation an amount of heat generated by the cooperation device is less than an amount of heat generated by the power device, wherein the at least one first lead is coupled to the first surface of the mounting substrate to be electrically coupled to the power die.

Abstract: In examples, a semiconductor device comprises a semiconductor package including a mold compound covering a semiconductor die. The semiconductor package has a surface and a cavity formed in the surface. The semiconductor device comprises an electronic device positioned within the cavity, the electronic device coupled to the semiconductor die via a conductive terminal extending through the mold compound.

Abstract: The present disclosure provides a method for in-situ monitoring of a full cycle of spatter formation, ejection, and falling in laser additive manufacturing. In a spatter formation stage, a paraxial multiocular high-speed photographing apparatus is used to provide a high temporal-spatial resolution, accurately collect spatial positions of spatters at each sampling time, and reconstruct a motion trajectory of the spatters in three-dimensional (3D) space. In an ejection stage, a coaxial monocular high-speed photographing apparatus is used to provide a long-term high temporal-spatial resolution and accurately collect and count an ejection velocity and angle and a motion trajectory of the spatters, and a photodiode monitors a radiation intensity and changes of the spatters. In a falling stage, a multiocular photographing apparatus is used to provide a high spatial resolution covering an entire powder bed and collect a distribution state of falling spatters.

Abstract: Embodiments of the present disclosure relate to an interconnect package, a method of forming the interconnect package, and a power module. The interconnect package includes a first insulating layer, a source connecting portion disposed on a surface of the first insulating layer and adapted to electrically connect a source pad to a substrate, a second insulating layer, and a gate connecting portion disposed between the first insulating layer and the second insulating layer and adapted to electrically connect a gate pad to the substrate.

Abstract: In some examples, a package comprises a die having a device side with circuitry formed therein; a passivation layer abutting the device side; and first and second vias coupling to the device side and extending through the passivation layer. The package includes first and second metal layers coupled to the first and second vias, respectively, the first and second metal layers abutting the passivation layer. The package includes an insulation layer abutting the first and second metal layers and separating the first and second metal layers, the insulation layer having an orifice in vertical alignment with the second metal layer. The package includes a third metal layer coupled to the second metal layer through the orifice, the third metal layer vertically aligned with the first and second metal layers. The package comprises a conductive member coupled to the third metal layer. The package includes a mold compound covering package components.