Patents by Inventor Qi-Ao Zhu
Qi-Ao Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250123752Abstract: Disclosed are a service lifetime monitoring and early warning method, a memory storage device, and a memory control circuit unit. The method includes: reading a history information from a rewritable non-volatile memory module, calculating a remaining lifetime based on the history information and a user habit, generating an early warning signal, and outputting the remaining lifetime and the early warning signal in response to the remaining lifetime being lower than a preset lifetime.Type: ApplicationFiled: November 15, 2023Publication date: April 17, 2025Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Dong Sheng Rao
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Publication number: 20250123641Abstract: A temperature control method and a temperature control system for controlling a temperature of a target device are disclosed. The target device is disposed in a temperature control device. The method includes: controlling an internal temperature of the temperature control device according to a base parameter and a compensation parameter; detecting a temperature of the target device via a temperature sensor during the period that the internal temperature of the temperature control device is controlled according to the base parameter and the compensation parameter; and adjusting the compensation parameter according to the temperature of the target device to change the internal temperature of the temperature control device.Type: ApplicationFiled: November 8, 2023Publication date: April 17, 2025Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Dong Sheng Rao
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Publication number: 20250123322Abstract: A variable temperature test system and an operation method thereof are provided. The variable temperature test system includes a main control device, multiple test devices, and a variable temperature test platform. The variable temperature test platform is coupled to the main control device and the test devices. The main control device provides an adjustment parameter according to at least one pending test. The variable temperature test platform includes multiple test areas, multiple temperature sensors, and a temperature control module. The test areas are respectively coupled to the test devices. The temperature sensors are respectively disposed in the test areas. The temperature control module is coupled to the test areas. The temperature control module adjusts a temperature of at least one test area according to the adjustment parameter.Type: ApplicationFiled: November 24, 2023Publication date: April 17, 2025Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Dong Sheng Rao
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Patent number: 12242730Abstract: A data arrangement method based on file system, a memory storage device and a memory control circuit unit are disclosed. The method includes: analyzing a file system stored in a system region to obtain a plurality of first logical units to which a first file belongs and first distribution information of a plurality of first physical units in a storage region, wherein the first physical units are mapped by the first logical units; determining whether to activate a data arrangement operation on the first file according to the first distribution information; after the data arrangement operation on the first file is activated, reading first data belonging to the first file from the first physical units; and writing, sequentially, the read first data to at least one second physical unit in the storage region.Type: GrantFiled: March 24, 2023Date of Patent: March 4, 2025Assignee: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Yin Ping Gao, Qi-Ao Zhu, Kuai Cao, Dong Sheng Rao
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Patent number: 12190972Abstract: A power-supply control device and a power test system are disclosed. The power test system includes a memory and a processor. The processor is configured to: obtain at least one power-supply path manner of at least one power-down test device; determine at least one power-supply path interface according to the at least one power-supply path manner; determine at least one electronic switch according to the at least one power-supply path interface; determine at least one target device to be tested; obtain at least one power-down test instruction according to the at least one target device; establish a target power-supply path corresponding to the target device between the at least one power-supply path interface and the at least one electronic switch according to the power-supply path establishment parameter; and at the target power-supply path, perform a power-down operation according to the power-down execution parameter.Type: GrantFiled: July 1, 2024Date of Patent: January 7, 2025Assignee: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Tong-Jin Liu, Qi-Ao Zhu, Jing Zhang, Ti De Zhang, Long Fei Zhang
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Patent number: 12135900Abstract: A memory polling method, a memory storage device and a memory control circuit unit are provided. The memory polling method includes: detecting a plurality of busy times corresponding to a plurality of physical units when executing a plurality of first commands; counting the busy times corresponding to the physical units to generate a count statistic value, and determine a delay time based on the count statistic value; and transmitting a plurality of status requests to a rewritable non-volatile memory module after the delay time.Type: GrantFiled: October 13, 2021Date of Patent: November 5, 2024Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Kuai Cao, Xin Wang, Xu Hui Cheng, Wan-Jun Hong
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Publication number: 20240295982Abstract: A memory operation control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes the following. Management data is established, which includes status recording data. First status information corresponding to a first physical unit is stored in the status recording data. An operation command is received from a host system. The management data is queried according to the operation command. Whether to allow an execution of the operation command on the first physical unit is determined according to a query result.Type: ApplicationFiled: April 10, 2023Publication date: September 5, 2024Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Wan-Jun Hong, Qi-Ao Zhu, Yang Zhang, Xin Wang
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Publication number: 20240289022Abstract: A data arrangement method based on file system, a memory storage device and a memory control circuit unit are disclosed. The method includes: analyzing a file system stored in a system region to obtain a plurality of first logical units to which a first file belongs and first distribution information of a plurality of first physical units in a storage region, wherein the first physical units are mapped by the first logical units; determining whether to activate a data arrangement operation on the first file according to the first distribution information; after the data arrangement operation on the first file is activated, reading first data belonging to the first file from the first physical units; and writing, sequentially, the read first data to at least one second physical unit in the storage region.Type: ApplicationFiled: March 24, 2023Publication date: August 29, 2024Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Yin Ping Gao, Qi-Ao Zhu, Kuai Cao, Dong Sheng Rao
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Patent number: 11983415Abstract: A memory management method for a memory storage device is provided. The memory management method includes: detecting effective information of at least one operation event performed by the memory storage device in a first mode; and adjusting a threshold value according to the effective information. The threshold value is configured to determine whether to instruct the memory storage device to enter the first mode.Type: GrantFiled: August 29, 2019Date of Patent: May 14, 2024Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Chong Peng, Zhi Wang, Wan-Jun Hong
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Patent number: 11954020Abstract: A memory adaptive temperature controlling method, a storage device, and a control circuit unit are provided. In this exemplary embodiment, the temperature value is obtained according to the temperature measured by the thermal sensor, and the access speed to be reached is calculated according to the temperature change rate within the specific time range and the adjustment percentage when it is determined that the speed-down or speed-up operation is required to be performed. By adjusting the access speed of the memory storage device in a stepwise manner, the temperature of the memory storage device may be stabilized, thereby striking the balance between the temperature stability and the system performance of the memory storage device.Type: GrantFiled: May 9, 2022Date of Patent: April 9, 2024Assignee: Hefei Core Storage Electronics LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Xu Hui Cheng
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Publication number: 20240028506Abstract: A mapping table re-building method, a memory storage device and a memory control circuit unit are disclosed. The method includes: receiving write command from a host system, wherein the write command instructs storing first data to a first logical unit; performing a programming operation according to the write command to store the first data and identification information of the first logical unit to a first physical unit; updating a mapping table in response to the programming operation; detecting a table abnormal event related to the mapping table; reading the identification information of the first logical unit from the first physical unit in response to the table abnormal event; and re-building the mapping table according to the identification information of the first logical unit.Type: ApplicationFiled: August 8, 2022Publication date: January 25, 2024Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Yuting Niu, Yang Zhang
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Patent number: 11822798Abstract: A data storing allocation method, a memory storage apparatus, and a memory control circuit unit are provided. The method includes the following. A plurality of data writing speeds of a plurality of memory units are detected. An initial write volume of each memory unit is determined according to a number of dies in each memory unit. At least one compensation data volume is calculated according to the data writing speeds and the initial write volume of each memory unit. A write data corresponding to a write command is written to the memory units according to the initial write volume of each memory unit and the at least one compensation data volume.Type: GrantFiled: December 19, 2021Date of Patent: November 21, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Kuai Cao, Xin Wang
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Patent number: 11817172Abstract: A table management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: storing multiple table groups, wherein each of the table groups includes multiple voltage management tables; detecting a status of the memory storage device; determining one of the table groups as a target table group according to the status of the memory storage device, wherein the target table group includes multiple target voltage management tables; reading data from a rewritable non-volatile memory module by using at least one read voltage level according to at least one of the target voltage management tables.Type: GrantFiled: April 29, 2022Date of Patent: November 14, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Jing Zhang, Yang Zhang
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Publication number: 20230325310Abstract: A memory adaptive temperature controlling method, a storage device, and a control circuit unit are provided.Type: ApplicationFiled: May 9, 2022Publication date: October 12, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Xu Hui Cheng
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Publication number: 20230326502Abstract: A table management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: storing multiple table groups, wherein each of the table groups includes multiple voltage management tables; detecting a status of the memory storage device; determining one of the table groups as a target table group according to the status of the memory storage device, wherein the target table group includes multiple target voltage management tables; reading data from a rewritable non-volatile memory module by using at least one read voltage level according to at least one of the target voltage management tables.Type: ApplicationFiled: April 29, 2022Publication date: October 12, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Jing Zhang, Yang Zhang
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Publication number: 20230297232Abstract: A table sorting method, a memory storage device, and a memory control circuit unit are provided. The method includes: reading first data from a first physical unit by using a first read voltage level according to a first voltage management table among multiple voltage management tables; decoding the first data; in response to the first data being successfully decoded, updating count information corresponding to the first voltage management table; and in response to the count information meeting a default condition, increasing a usage priority of the first voltage management table among the voltage management tables.Type: ApplicationFiled: April 11, 2022Publication date: September 21, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Qi-Ao Zhu, Jing Zhang, Jian Hu
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Patent number: 11748026Abstract: A mapping information recording method for a rewritable non-volatile memory module is provided. The rewritable non-volatile memory module includes multiple physical erasing units, and each of the physical erasing unit includes multiple physical programming units. The mapping information recording method includes: receiving first continuous data from a host system, wherein the host system instructs to store the first continuous data to a first continuous logical address; establishing a continuous mapping table to record a start logical address of the first continuous logical address, a length of the first continuous logical address, and a bitmap; writing the first continuous data into first physical programming units; and marking bits of virtual blocks corresponding to the first continuous logical address in the bitmap as a valid state, numbering the virtual blocks, and recording the numbers into the continuous mapping table.Type: GrantFiled: December 16, 2021Date of Patent: September 5, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang
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Patent number: 11693567Abstract: A memory performance optimization method, a memory control circuit unit, and a memory storage device are provided. The method includes the following. An idle time of the memory storage device is counted in an active mode. The memory storage device is instructed to enter a first low electricity consumption mode from the active mode in response to the idle time being greater than an idle threshold. A first waiting time of the memory storage device is counted in the first low electricity consumption mode. The memory storage device is instructed to enter a second low electricity consumption mode from the first low electricity consumption mode in response to the first waiting time being greater than a first waiting threshold. Electricity consumption of the second low electricity consumption mode is lower than electricity consumption of the first low electricity consumption mode.Type: GrantFiled: November 22, 2021Date of Patent: July 4, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Kuai Cao, Xin Wang, Xu Hui Cheng, Dong Sheng Rao
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Publication number: 20230205451Abstract: A multi-channel memory storage device, a memory control circuit unit, and a data reading method are provided. The method includes: determining whether a storage space of a buffer memory is insufficient when a multi-channel access is performed; issuing a data read command corresponding to each of a plurality of multi-channels to a rewritable non-volatile memory module according to a logical address in a host read command in response to insufficient storage space of the buffer memory to read data corresponding to each of the plurality of multi-channels from a data storage area to a data cache area via the plurality of multi-channels; and allocating the storage space of the buffer memory to the rewritable non-volatile memory module after the storage space of the buffer memory is released and issuing a cache read command to move first data in data temporarily stored in the data cache area to the buffer memory.Type: ApplicationFiled: January 19, 2022Publication date: June 29, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Wan-Jun Hong, Qi-Ao Zhu, Xin Wang, Yang Zhang, Xu Hui Cheng, Jian Hu
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Patent number: 11669270Abstract: A multi-channel memory storage device, a memory control circuit unit, and a data reading method are provided. The method includes: determining whether a storage space of a buffer memory is insufficient when a multi-channel access is performed; issuing a data read command corresponding to each of a plurality of multi-channels to a rewritable non-volatile memory module according to a logical address in a host read command in response to insufficient storage space of the buffer memory to read data corresponding to each of the plurality of multi-channels from a data storage area to a data cache area via the plurality of multi-channels; and allocating the storage space of the buffer memory to the rewritable non-volatile memory module after the storage space of the buffer memory is released and issuing a cache read command to move first data in data temporarily stored in the data cache area to the buffer memory.Type: GrantFiled: January 19, 2022Date of Patent: June 6, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Wan-Jun Hong, Qi-Ao Zhu, Xin Wang, Yang Zhang, Xu Hui Cheng, Jian Hu