Patents by Inventor Qiliang Ni
Qiliang Ni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11121045Abstract: The present invention provides a method for detecting an ultra-small defect on a wafer surface, film layer having ultra-small defect that causes abnormalities on the surface of the film layer; form a photoresist pattern with a pattern defect; etching the film layer according to the photoresist pattern to form a film layer pattern with an enlarged defect; and scanning the film layer pattern by using a defect scanner to capture the enlarged defect. In this method, enlarging the size of the ultra-fine particle defect through the exposure defocusing principle; or by adding the photomask consisting of the repeating units, using the repetition pattern as the exposure pattern and combing with the repeating cell to cell comparison method, the capture ability of the detection machine is further improved. Therefore, it can be detected by amplifying the defects of ultrafine particles which cannot be detected by conventional methods.Type: GrantFiled: November 21, 2019Date of Patent: September 14, 2021Assignee: Shanghai Huali Microelectronics CorporationInventors: Xianghua Hu, Gaoyu Wang, Guangzhi He, Xiaofang Gu, Qiliang Ni
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Publication number: 20210057289Abstract: The present invention provides a method for detecting an ultra-small defect on a wafer surface, film layer having ultra-small defect that causes abnormalities on the surface of the film layer; form a photoresist pattern with a pattern defect; etching the film layer according to the photoresist pattern to form a film layer pattern with an enlarged defect; and scanning the film layer pattern by using a defect scanner to capture the enlarged defect. In this method, enlarging the size of the ultra-fine particle defect through the exposure defocusing principle; or by adding the photomask consisting of the repeating units, using the repetition pattern as the exposure pattern and combing with the repeating cell to cell comparison method, the capture ability of the detection machine is further improved. Therefore, it can be detected by amplifying the defects of ultrafine particles which cannot be detected by conventional methods.Type: ApplicationFiled: November 21, 2019Publication date: February 25, 2021Applicant: Shanghai Huali Microelectronics CorporationInventors: Xianghua Hu, Gaoyu Wang, Guangzhi He, Xiaofang Gu, Qiliang Ni
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Patent number: 9269639Abstract: The present invention provides a method of detecting and measuring the alignment shift of the contacts relative to the gate structures. The method comprises: designing a test model array having different test model regions on the substrate; forming second conductivity type doped well regions, gate structures, and first conductivity type doped active regions in each of the test model regions; forming contacts in each of the test model region; scanning the test model array by an electron-beam inspector to obtain light-dark patterns of the contacts; and detecting and measuring the alignment shift of the contacts relative to the gate structures according to the light-dark patterns of the contacts and the critical dimensions of the transistors in the test model regions.Type: GrantFiled: September 30, 2013Date of Patent: February 23, 2016Assignee: Shanghai Huali Microelectronics CorporationInventors: Rongwei Fan, Feijue Liu, Yin Long, Qiliang Ni, Hunglin Chen
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Patent number: 9080863Abstract: The present invention is related to the semiconductor manufacturing field, especially a method for monitoring alignment between contact holes and polycrystalline silicon gate by setting a plurality of equidistant contact holes with same sharp on poly-silicon and residual active area, and then obtain the process alignment profile of the quantized values in the plane in order to have a better control of process quality, thereby have a better control of the quality of the process.Type: GrantFiled: December 31, 2012Date of Patent: July 14, 2015Assignee: SHANGAI HUALI MICROELECTRONICS CORPORATIONInventors: Qiliang Ni, Hunglin Chen, Zhounan Wang, Yin Long, Mingsheng Guo
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Patent number: 8987013Abstract: A method of inspecting misalignment of a polysilicon gate is disclosed, characterized in forming only NMOS devices in P-wells in a test wafer and utilizing an advanced electron beam inspection tool operating with a positive mode to carry out electrical defect inspection. The method can be applied in precisely figuring out the in-plane misalignment of the polysilicon gates of an in-process semiconductor product and identifying a misalignment tendency therebetween across a wafer by verifying all locations of interest thereon, thus providing a methodology for process window optimization and on-line monitoring and contributing to the manufacturing process and yield improvement.Type: GrantFiled: December 27, 2013Date of Patent: March 24, 2015Assignee: Shanghai Huali Microelectronics CorporationInventors: Rongwei Fan, Hunglin Chen, Yin Long, Qiliang Ni
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Publication number: 20150004723Abstract: A method of inspecting misalignment of a polysilicon gate is disclosed, characterized in forming only NMOS devices in P-wells in a test wafer and utilizing an advanced electron beam inspection tool operating with a positive mode to carry out electrical defect inspection. The method can be applied in precisely figuring out the in-plane misalignment of the polysilicon gates of an in-process semiconductor product and identifying a misalignment tendency therebetween across a wafer by verifying all locations of interest thereon, thus providing a methodology for process window optimization and on-line monitoring and contributing to the manufacturing process and yield improvement.Type: ApplicationFiled: December 27, 2013Publication date: January 1, 2015Applicant: SHANGHAI HUALI MICROELECTRONICS CORPORATIONInventors: Rongwei FAN, Hunglin CHEN, Yin LONG, Qiliang NI
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Publication number: 20140377888Abstract: The present invention provides a method of detecting and measuring the alignment shift of the contacts relative to the gate structures. The method comprises: designing a test model array having different test model regions on the substrate; forming second conductivity type doped well regions, gate structures, and first conductivity type doped active regions in each of the test model regions; forming contacts in each of the test model region; scanning the test model array by an electron-beam inspector to obtain light-dark patterns of the contacts; and detecting and measuring the alignment shift of the contacts relative to the gate structures according to the light-dark patterns of the contacts and the critical dimensions of the transistors in the test model regions.Type: ApplicationFiled: September 30, 2013Publication date: December 25, 2014Inventors: Rongwei Fan, Feijue Liu, Yin Long, Qiliang Ni, Hunglin Chen
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Patent number: 8865482Abstract: A method of detecting the circular uniformity of semiconductor circular contact holes. Several detection circuit structures are disposed on the semiconductor wafer: N-type active regions and P-type active regions; silicon dioxide layers separate the N-type active regions from the P-type active regions; the N-type active regions are formed in the P well and the P-type active regions are formed in the N well; polysilicon gates bridge the N-type active regions and the P-type active regions; gate oxide layers insulate the P-type regions and the N-type regions from the polysilicon gates, so that the P-type regions and the N-type regions are independent; the N-type active regions connect with circular contact holes while the P-type active regions and the polysilicon gates connect with oval contact holes; a electron beam scanner detects the circular uniformity of the contact holes. This invention advantageously reflects effectively and comprehensively the circular uniformity of the contact holes.Type: GrantFiled: October 15, 2013Date of Patent: October 21, 2014Assignee: Shanghai Huali Microelectronics CorporationInventors: Kai Wang, HungLin Chen, Yin Long, Qiliang Ni, MingShen Kuo
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Publication number: 20140127835Abstract: A method of detecting the circular uniformity of semiconductor circular contact holes. Several detection circuit structures are disposed on the semiconductor wafer: N-type active regions and P-type active regions; silicon dioxide layers separate the N-type active regions from the P-type active regions; the N-type active regions are formed in the P well and the P-type active regions are formed in the N well; polysilicon gates bridge the N-type active regions and the P-type active regions; gate oxide layers insulate the P-type regions and the N-type regions from the polysilicon gates, so that the P-type regions and the N-type regions are independent; the N-type active regions connect with circular contact holes while the P-type active regions and the polysilicon gates connect with oval contact holes; a electron beam scanner detects the circular uniformity of the contact holes. This invention advantageously reflects effectively and comprehensively the circular uniformity of the contact holes.Type: ApplicationFiled: October 15, 2013Publication date: May 8, 2014Applicant: Shanghai Huali Microelectronics CorporationInventors: Kai WANG, HungLin CHEN, Yin LONG, Qiliang NI, MingShen KUO
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Patent number: 8658438Abstract: The invention provides a measurement of lateral diffusion of implanted ions in the doped well regions of semiconductor devices comprising: designing a test model having active areas, the P-type and N-type doped well regions of the active areas are separated by STI, and the bottom width of the STI is determined; performing multiple processes on the test model comprising the ion implantation process and the tungsten interconnection process to simulate a semiconductor device structure, wherein during the ion implantation process, in the P-type or N-type doped well regions, only the first procedure of the ion implantation process is performed; scanning the test model, obtaining a light-dark pattern of the tungsten interconnects. The present invention is convenient and accessible and can provide reference to optimize the property of the doped well regions of the semiconductor devices and ensure the yield enhancement.Type: GrantFiled: December 20, 2012Date of Patent: February 25, 2014Assignee: Shanghai Huali Microelectronics CorporationInventors: Rongwei Fan, Qiliang Ni, Yin Long, Kai Wang, Hunglin Chen
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Publication number: 20130342842Abstract: The present invention is related to the semiconductor manufacturing field, especially a method for monitoring alignment between contact holes and polycrystalline silicon gate by setting a plurality of equidistant contact holes with same sharp on poly-silicon and residual active area, and then obtain the process alignment profile of the quantized values in the plane in order to have a better control of process quality, thereby have a better control of the quality of the process.Type: ApplicationFiled: December 31, 2012Publication date: December 26, 2013Applicant: Shangai Huali Microelectronics CorporationInventors: Qiliang Ni, Hunglin Chen, Zhounan Wang, Yin Long, Mingsheng Guo
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Publication number: 20080124891Abstract: A method for preventing wafer edge peeling in a metal wiring process. A buffer layer is formed between a diffusion barrier layer of a metal wiring substructure and a semiconductor substrate. The buffer layer is an insulating dielectric layer, preferably a silicon oxide layer, or a polysilicon layer. The silicon oxide layer is formed in a process for forming a Shallow Trench Isolation (STI) structure. Using the above processes, the structure of direct contact between the diffusion barrier layer of the metal wiring structure and the semiconductor substrate can be avoided, and hence wafer edge peeling can be avoided without any modification to a conventional semiconductor fabrication procedure and with low cost and improved operability. This method is applicable to various semiconductor fabrication processes.Type: ApplicationFiled: October 1, 2007Publication date: May 29, 2008Applicant: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Kegang Zhang, Hunglin Chen, Yin Long, Qiliang Ni, Wenlei Chen, Yanbo Shangguan, Xiaorong Zhu