Patents by Inventor Qiliang Yan

Qiliang Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7721246
    Abstract: One embodiment of the present invention determines the effect of placing an assist feature at a location in a layout. During operation, the system receives a first value which was pre-computed by convolving a model with a layout at an evaluation point, wherein the model models semiconductor manufacturing processes. Next, the system determines a second value by convolving the model with an assist feature, which is assumed to be located at a first location which is in proximity to the evaluation point. The system then determines the effect of placing an assist feature using the first value and the second value. An embodiment of the present invention can be used to determine a substantially optimal location for placing an assist feature in a layout.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: May 18, 2010
    Assignee: Synopsys, Inc.
    Inventors: Jianliang Li, Qiliang Yan, Lawrence S. Melvin, III, Levi D. Barnes, Abani M. Biswas, Alakananda A. Biswas, legal representative
  • Publication number: 20100086196
    Abstract: One embodiment of the present invention provides techniques and systems for determining modeling parameters for a photolithography process. During operation, the system can receive a layout. Next, the system can determine an iso-focal pattern in the layout. The system can then determine multiple aerial-image-intensity values in proximity to the iso-focal pattern by convolving the layout with multiple optical models, wherein the multiple optical models model the photolithography process's optical system under different focus conditions. Next, the system can determine a location in proximity to the iso-focal pattern where the aerial-image-intensity values are substantially insensitive to focus variations. The system can then use the location and the associated aerial-image-intensity values to determine an optical threshold and a resist bias. The optical threshold and the resist bias can then be used for modeling the photolithography process.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 8, 2010
    Applicant: SYNOPSYS, INC.
    Inventors: Jianliang Li, Lawrence S. Melvin III, Qiliang Yan
  • Patent number: 7681172
    Abstract: One embodiment of the present invention provides a system that accurately predicts an apodization effect in an optical lithography system for manufacturing an integrated circuit. During operation, the system starts by collecting an apodization-effect-induced spatial transmission profile from the optical lithography system. The system then constructs an apodization model based on the spatial transmission profile. Next, the system enhances a lithography model for the optical lithography system by incorporating the apodization model into the lithography model, wherein the enhanced lithography model accurately predicts the effects of apodization on the optical lithography system.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: March 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Qiaolin Zhang, Paul VanAdrichem, Laurent Depre, Qiliang Yan
  • Patent number: 7496880
    Abstract: One embodiment of the present invention provides a system that assesses the quality of a process model. During operation, the system receives a mask layout and additionally receives a process model that models the effects of one or more semiconductor manufacturing processes on the mask layout. Next, the system computes a gradient of the process model with respect to a process model parameter. The system then computes a quality indicator at an evaluation point in the mask layout using the gradient of the process model and the mask layout. Next, the system assesses the quality of the process model using the quality indicator. In one embodiment, the system assesses the quality of the process model by comparing the quality indicator with a threshold.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: February 24, 2009
    Assignee: Synopsys, Inc.
    Inventors: Lawrence S. Melvin, III, Qiliang Yan
  • Publication number: 20080276211
    Abstract: One embodiment provides a system for determining an improved process model that models one or more semiconductor manufacturing processes. During operation, the system can receive a first process model. Next, the system can receive a 2-D-pattern detecting kernel which can detect 2-D patterns. The system can then receive a second set of empirical data which is associated with 2-D patterns in a test layout. Next, the system can determine an improved process model using the first process model, the 2-D-pattern detecting kernel, the test layout, and the second set of empirical data.
    Type: Application
    Filed: May 4, 2007
    Publication date: November 6, 2008
    Inventors: Jianliang Li, Qiliang Yan, Lawrence S. Melvin
  • Publication number: 20080219590
    Abstract: One embodiment of the present invention provides a system that reduces computational complexity in simulating an image resulting from an original mask and an optical transmission system. During operation, the system obtains a set transmission cross coefficient (TCC) kernel functions based on the optical transmission system, and obtains a set of transmission functions for a representative pattern which contains features representative of the original mask. The system constructs a new set of kernel functions based on the TCC kernel functions and the transmission functions for the representative pattern, wherein responses to the new kernel functions in a resulting image corresponding to the representative pattern are substantially uncorrelated with one another. The system further produces an intensity distribution of a resulting image corresponding to the original mask based on the new kernel functions, thereby facilitating prediction of a layout that can be produced from the original mask.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Inventors: Jianliang Li, Qiliang Yan, Lawrence S. Melvin, James P. Shiely
  • Publication number: 20080184192
    Abstract: One embodiment of the present invention provides a system that accurately predicts an apodization effect in an optical lithography system for manufacturing an integrated circuit. During operation, the system starts by collecting an apodization-effect-induced spatial transmission profile from the optical lithography system. The system then constructs an apodization model based on the spatial transmission profile. Next, the system enhances a lithography model for the optical lithography system by incorporating the apodization model into the lithography model, wherein the enhanced lithography model accurately predicts the effects of apodization on the optical lithography system.
    Type: Application
    Filed: January 29, 2007
    Publication date: July 31, 2008
    Inventors: Qiaolin Zhang, Paul VanAdrichem, Laurent Depre, Qiliang Yan
  • Patent number: 7320119
    Abstract: One embodiment of the present invention provides a system that identifies a problem edge in a mask layout which is likely to have manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more process conditions that are different from nominal process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes an edge-detecting process-sensitivity model by convolving the process-sensitivity model with an edge-detecting function which can be used to detect edges in an image. Next, the system identifies a problem edge in the mask layout using the edge-detecting process-sensitivity model.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: January 15, 2008
    Assignee: Synopsys, Inc.
    Inventors: Lawrence S. Melvin, III, James P. Shiely, Qiliang Yan, Benjamin D. Painter
  • Patent number: 7308673
    Abstract: One embodiment of the present invention provides a system that improves lithography performance by correcting for 3D mask effects. During operation the system receives a mask layout that contains etched regions, called shifters, which can have a phase shift relative to other regions. Next, the system chooses a shifter in the mask layout. The system then corrects for 3D mask effects by, iteratively, (a) selecting a region within the shifter, (b) adjusting the phase shift of the selected region in a simulation model to account for 3D mask effects, and (c) modifying the shape of the shifter based on the difference between a desired pattern and a simulated pattern generated using the simulation model.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: December 11, 2007
    Assignee: Synopsys, Inc.
    Inventors: Lawrence S. Melvin, III, Qiliang Yan, James P. Shiely
  • Publication number: 20070250804
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
    Type: Application
    Filed: May 8, 2007
    Publication date: October 25, 2007
    Inventors: Lawrence Melvin, James Shiely, Qiliang Yan
  • Patent number: 7243332
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: July 10, 2007
    Assignee: Synopsys, Inc.
    Inventors: Lawrence S. Melvin, III, James P. Shiely, Qiliang Yan
  • Publication number: 20070038973
    Abstract: One embodiment of the present invention determines the effect of placing an assist feature at a location in a layout. During operation, the system receives a first value which was pre-computed by convolving a model with a layout at an evaluation point, wherein the model models semiconductor manufacturing processes. Next, the system determines a second value by convolving the model with an assist feature, which is assumed to be located at a first location which is in proximity to the evaluation point. The system then determines the effect of placing an assist feature using the first value and the second value. An embodiment of the present invention can be used to determine a substantially optimal location for placing an assist feature in a layout.
    Type: Application
    Filed: October 19, 2006
    Publication date: February 15, 2007
    Inventors: Jianliang Li, Qiliang Yan, Lawrence Melvin, Levi Barnes, Alakananda Biswas, Abani Biswas
  • Publication number: 20060236297
    Abstract: One embodiment of the present invention provides a system that assesses the quality of a process model. During operation, the system receives a mask layout and additionally receives a process model that models the effects of one or more semiconductor manufacturing processes on the mask layout. Next, the system computes a gradient of the process model with respect to a process model parameter. The system then computes a quality indicator at an evaluation point in the mask layout using the gradient of the process model and the mask layout. Next, the system assesses the quality of the process model using the quality indicator. In one embodiment, the system assesses the quality of the process model by comparing the quality indicator with a threshold.
    Type: Application
    Filed: October 3, 2005
    Publication date: October 19, 2006
    Inventors: Lawrence Melvin, Qiliang Yan
  • Publication number: 20060190914
    Abstract: One embodiment of the present invention provides a system that identifies a problem edge in a mask layout which is likely to have manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more process conditions that are different from nominal process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes an edge-detecting process-sensitivity model by convolving the process-sensitivity model with an edge-detecting function which can be used to detect edges in an image. Next, the system identifies a problem edge in the mask layout using the edge-detecting process-sensitivity model.
    Type: Application
    Filed: May 6, 2005
    Publication date: August 24, 2006
    Inventors: Lawrence Melvin, James Shiely, Qiliang Yan, Benjamin Painter
  • Publication number: 20060190913
    Abstract: One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
    Type: Application
    Filed: March 17, 2005
    Publication date: August 24, 2006
    Inventors: Lawrence Melvin, James Shiely, Qiliang Yan
  • Publication number: 20060156270
    Abstract: One embodiment of the present invention provides a system that improves lithography performance by correcting for 3D mask effects. During operation the system receives a mask layout that contains etched regions, called shifters, which can have a phase shift relative to other regions. Next, the system chooses a shifter in the mask layout. The system then corrects for 3D mask effects by, iteratively, (a) selecting a region within the shifter, (b) adjusting the phase shift of the selected region in a simulation model to account for 3D mask effects, and (c) modifying the shape of the shifter based on the difference between a desired pattern and a simulated pattern generated using the simulation model.
    Type: Application
    Filed: January 10, 2005
    Publication date: July 13, 2006
    Inventors: Lawrence Melvin, Qiliang Yan, James Shiely