Patents by Inventor Qing Ou

Qing Ou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8866316
    Abstract: In one embodiment, an energy harvester is provided. The energy harvester includes, an energy conversion device configured to convert vibrational energy to electrical energy, a mass coupled to the energy conversion device, and at least one biasing mechanism coupled to the mass. The biasing mechanism is selectively adjustable and selectively adjusting the biasing mechanism adjusts a resonance frequency of the energy conversion device and the mass.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: October 21, 2014
    Assignee: General Electric Company
    Inventors: Alan Ruthven Wood, Qing Ou, Nigel Trevor Leigh, XiaoQi Chen, Stefanie Gutschmidt
  • Publication number: 20130341936
    Abstract: In one embodiment, an energy harvester is provided. The energy harvester includes, an energy conversion device configured to convert vibrational energy to electrical energy, a mass coupled to the energy conversion device, and at least one biasing mechanism coupled to the mass. The biasing mechanism is selectively adjustable and selectively adjusting the biasing mechanism adjusts a resonance frequency of the energy conversion device and the mass.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Alan Ruthven Wood, Qing Ou, Nigel Trevor Leigh, XiaoQi Chen, Stefanie Gutschmidt
  • Publication number: 20080024160
    Abstract: Systems and methods for on-chip resistor calibration are disclosed. A circuit for calibrating a resistance value on an integrated circuit includes a resistor network, a reference voltage generator, a comparator, a servo loop, and a shift register. The resistor network includes a plurality of resistor and switch pairs in parallel. The resistor network further includes a servo resistor in series with a servo resistor switch such that the servo resistor and servo resistor switch are in parallel with the plurality of resistor and switch pairs. The servo loop generates a shift register gating signal and includes a current sample register for storing a current comparator output data value and a previous sample register for storing a previous comparator output data value. The shift register, upon receipt of a shift register gating signal at a first state, inputs the current comparator output data value to shift data bits through the shift register.
    Type: Application
    Filed: July 25, 2006
    Publication date: January 31, 2008
    Inventors: Qing Ou-yang, Quan Yu, Ming Qu
  • Patent number: 7071767
    Abstract: A voltage/current reference circuit includes a first bipolar transistor and a second bipolar transistor that exhibit a first voltage drop VBE1 and a second voltage drop VBE2, respectively. A first resistor, having a resistance R1, is configured to draw a first current equal to (VBE1?VBE2)/R1. A second resistor, having a resistance R2, is configured to draw a second current equal to VBE1/R2. A first transistor supplies the first and second currents to the first and second resistors. A second transistor, having a current mirror configuration with respect to the first transistor, directly provides a reference current equal to (VBE1?VBE2)/R1+VBE1/R2. A third transistor, having a current mirror configuration with respect to the first transistor, provides a current equal to the reference current to a third resistor having a resistance R3 and a third bipolar transistor that exhibits a third voltage drop VBE3, thereby generating a reference voltage.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: July 4, 2006
    Assignee: Integrated Device Technology, Inc.
    Inventors: Qing Ou-yang, Howard Yang, YuFei Gu
  • Publication number: 20050035814
    Abstract: A voltage/current reference circuit includes a first bipolar transistor and a second bipolar transistor that exhibit a first voltage drop VBE1 and a second voltage drop VBE2, respectively. A first resistor, having a resistance R1, is configured to draw a first current equal to (VBE1?VBE2)/R1. A second resistor, having a resistance R2, is configured to draw a second current equal to VBE1/R2. A first transistor supplies the first and second currents to the first and second resistors. A second transistor, having a current mirror configuration with respect to the first transistor, directly provides a reference current equal to (VBE1?VBE2)/R1+VBE1/R2. A third transistor, having a current mirror configuration with respect to the first transistor, provides a current equal to the reference current to a third resistor having a resistance R3 and a third bipolar transistor that exhibits a third voltage drop VBE3, thereby generating a reference voltage.
    Type: Application
    Filed: April 26, 2004
    Publication date: February 17, 2005
    Applicant: Integrated Device Technology, Inc.
    Inventors: Qing Ou-yang, Howard Yang, YuFei Gu