Patents by Inventor Qing Zhang Zhang

Qing Zhang Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
    Patent number: 7691747
    Abstract: A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 6, 2010
    Assignee: STATS ChipPAC, Ltd
    Inventors: Yaojian Lin, Haijing Cao, Qing Zhang Zhang, Kang Chen, Jianmin Fang
  • Semiconductor Device and Method for Forming Passive Circuit Elements with Through Silicon Vias to Backside Interconnect Structures
    Publication number: 20090140381
    Abstract: A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 4, 2009
    Applicant: STATS CHIPPAC, LTD.
    Inventors: Yaojian Lin, Haijing Cao, Qing Zhang Zhang, Kang Chen, Jianmin Fang