Patents by Inventor Qing-Chun He

Qing-Chun He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7887928
    Abstract: A lead frame having a coating of organic compounds on its lead fingers prevents tin and flux from contaminating the lead fingers after die attach. The coating is removed prior to wire bonding. The coating allows for reliable second bonds (bond between wires and lead fingers) to be formed, decreasing the likelihood of non-stick and improving wire peel strength.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: February 15, 2011
    Assignee: Freescale Semiconductor, Inc
    Inventors: Chao Wang, Qing Chun He, Zhe Li, Zhijie Wang, Dehong Ye
  • Publication number: 20090111220
    Abstract: A lead frame having a coating of organic compounds on its lead fingers prevents tin and flux from contaminating the lead fingers after die attach. The coating is removed prior to wire bonding. The coating allows for reliable second bonds (bond between wires and lead fingers) to be formed, decreasing the likelihood of non-stick and improving wire peel strength.
    Type: Application
    Filed: May 30, 2008
    Publication date: April 30, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Chao Wang, Qing Chun He, Zhe Li, Zhijie Wang, Dehong Ye
  • Patent number: 7112871
    Abstract: A semiconductor device (10) includes a first leadframe (18) having a perimeter (20) that defines a cavity (22) and leads (14) extending inwardly from the perimeter, and a second leadframe (32) having top and bottom surfaces and a die paddle surrounding a die receiving area (36). An integrated circuit (12) is placed within the die receiving area of the second leadframe. The IC has bonding pads (44) located on a peripheral portion of its top surface. The second leadframe and the IC are in facing relation with the first leadframe such that the leads of the first leadframe are electrically connected to respective ones of the bonding pads. A mold compound (50) is injected between the first and second leadframes and covers the second leadframe top surface and a central area of the first surface of the IC. At least the bottom surfaces of the leads are exposed.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: September 26, 2006
    Assignee: Freescale Semiconductor, INC
    Inventors: Hei Ming Shiu, Wai Wong Chow, Qing-Chun He
  • Publication number: 20050156291
    Abstract: A semiconductor device (10) includes a first leadframe (18) having a perimeter (20) that defines a cavity (22) and leads (14) extending inwardly from the perimeter, and a second leadframe (32) having top and bottom surfaces and a die paddle surrounding a die receiving area (36). An integrated circuit (12) is placed within the die receiving area of the second leadframe. The IC has bonding pads (44) located on a peripheral portion of its top surface. The second leadframe and the IC are in facing relation with the first leadframe such that the leads of the first leadframe are electrically connected to respective ones of the bonding pads. A mold compound (50) is injected between the first and second leadframes and covers the second leadframe top surface and a central area of the first surface of the IC. At least the bottom surfaces of the leads are exposed.
    Type: Application
    Filed: January 26, 2005
    Publication date: July 21, 2005
    Inventors: Hei Shiu, Wai Chow, Qing-Chun He
  • Patent number: 6867072
    Abstract: A semiconductor device (10) includes a first leadframe (18) having a perimeter (20) that defines a cavity (22) and leads (14) extending inwardly from the perimeter, and a second leadframe (32) having top and bottom surfaces and a die paddle surrounding a die receiving area (36). An integrated circuit (12) is placed within the die receiving area of the second leadframe. The IC has bonding pads (44) located on a peripheral portion of its top surface. The second leadframe and the IC are in facing relation with the first leadframe such that the leads of the first leadframe are electrically connected to respective ones of the bonding pads. A mold compound (50) is injected between the first and second leadframes and covers the second leadframe top surface and a central area of the first surface of the IC. At least the bottom surfaces of the leads are exposed.
    Type: Grant
    Filed: January 7, 2004
    Date of Patent: March 15, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hei Ming Shiu, Wai Wong Chow, Qing-Chun He