Patents by Inventor Qingru Meng

Qingru Meng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Extended select gate lifetime
    Patent number: 9490018
    Abstract: A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: November 8, 2016
    Assignee: Intel Corporation
    Inventors: Yogesh B. Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant P. Belgal
  • EXTENDED SELECT GATE LIFETIME
    Publication number: 20150213900
    Abstract: A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command.
    Type: Application
    Filed: April 6, 2015
    Publication date: July 30, 2015
    Applicant: INTEL CORPORATION
    Inventors: Yogesh B. Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant P. Belgal
  • Extended select gate lifetime
    Patent number: 9030885
    Abstract: A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: May 12, 2015
    Assignee: Intel Corporation
    Inventors: Yogesh B Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant P Belgal
  • EXTENDED SELECT GATE LIFETIME
    Publication number: 20150078088
    Abstract: A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Applicant: INTEL CORPORATION
    Inventors: Yogesh B Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant P Belgal
  • Extended select gate lifetime
    Patent number: 8929151
    Abstract: A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: January 6, 2015
    Assignee: Intel Corporation
    Inventors: Yogesh Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant P Belgal
  • EXTENDED SELECT GATE LIFETIME
    Publication number: 20140307507
    Abstract: A flash memory device may include two or more flash memory cells organized as a NAND string in a block of flash memory cells, and flash cells, coupled to the NAND string at opposite ends, to function as select gates. The flash memory device may be capable of providing information related to a voltage threshold of the select gates to a flash controller, erasing the flash cells that function as select gates in response to a select gate erase command, and programming the flash cells that function as select gates in response to a select gate program command.
    Type: Application
    Filed: June 24, 2014
    Publication date: October 16, 2014
    Inventors: Yogesh Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant P. Belgal
  • Extended select gate lifetime
    Patent number: 8792283
    Abstract: A memory device may include two or more memory cells in an integrated circuit, at least one flash cell acting as a select gate coupled to the two or more memory cells, and an interface to accept a select gate erase command and a select gate program command during normal operation of the integrated circuit. The integrated circuit may be capable to perform operations to erase the at least one select gate in response to the select gate erase command, and program the at least one select gate in response to the select gate program command.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: July 29, 2014
    Assignee: Intel Corporation
    Inventors: Yogesh B. Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant Belgal
  • EXTENDED SELECT GATE LIFETIME
    Publication number: 20130343129
    Abstract: A memory device may include two or more memory cells in an integrated circuit, at least one flash cell acting as a select gate coupled to the two or more memory cells, and an interface to accept a select gate erase command and a select gate program command during normal operation of the integrated circuit. The integrated circuit may be capable to perform operations to erase the at least one select gate in response to the select gate erase command, and program the at least one select gate in response to the select gate program command.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Yogesh B. Wakchaure, Kiran Pangal, Xin Guo, Qingru Meng, Hanmant Belgal