Patents by Inventor Qingyu Lin

Qingyu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11847392
    Abstract: An approach is disclosed herein for dynamic design switching for high performance mixed signal simulation. Disclosed herein is a new approach to simulation processes that allows for different segments of a design to be swapped out without requiring re-elaboration. This is an improvement over current techniques and decreases the amount of time need to simulate a design. In some embodiments, the technique illustrated herein is combined with an automated triggering mechanism that controls the selection of alternate representations for the same element base on those triggers. In some embodiments a new multiplexor structure is provided that is specifically tailored to solving the present issue.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: December 19, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Qingyu Lin, Patrick O'Halloran, Xiao Wang
  • Patent number: 11347913
    Abstract: A method of reconstructing an emulated circuit layout for graphical display includes receiving a pre-layout circuit including one or more devices and one or more nodes. The method includes generating a Detailed Standard Parasitic Format (DPSF) netlist representing a post-layout circuit. The DPSF netlist includes a plurality of instances representing the one or more devices, the one or more nodes, and one or more parasitic elements not included in the pre-layout circuit. The method includes identifying at least one node of the one or more nodes that is associated with the one or more parasitic elements. The method includes updating the DPSF netlist to associate the one or more parasitic elements with the at least one node. The method includes constructing graphical representation of the post-layout circuit based on the updated DPSF netlist. The method includes causing a display device to display the graphical representation.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 31, 2022
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Yanfei Shen, Qingyu Lin, Patrick O'Halloran
  • Patent number: 11017136
    Abstract: Disclosed are methods, systems, and articles of manufacture for characterizing electromigration effects in an electronic design. These techniques determine an electrical characteristic at a port of a portion of an electronic design and select a number of frequencies in the frequency domain for the electrical characteristic. Multiple electric currents through a circuit component in the portion may be determined at least by performing a number of analyses for the number of frequencies. An electromigration effect may be characterized for the circuit component by using at least the multiple electric currents.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: May 25, 2021
    Assignee: Cadence Design Systems, Inc.
    Inventor: Qingyu Lin
  • Patent number: 10095821
    Abstract: Electronic design automation systems, methods, and computer readable media are presented for the generation of power-related connectivity data by an analog simulator (for example, by propagating the power supply data and/or ground data through the circuit components of the analog design schematic). In some embodiments, the verification module determines consistency between different versions of power-related connectivity data, such as: (i) power-related connectivity data from the analog design schematic and (ii) power-related connectivity data from the power-related data characterizing the mixed-signal design. Such verification determines whether the mixed-signal design satisfies the low power specification as expressed in the power-related data characterizing the mixed-signal design.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: October 9, 2018
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Qingyu Lin, Nan Zhang, Kun Zhang
  • Patent number: 9703921
    Abstract: A system, method, and computer program product for determining whether a design for a circuit meets design specifications, to facilitate the provision of a manufacturable description of the circuit. A computer-operated circuit simulation tool reads the design for the circuit and a power specification, and selectively internally creates a network connection and inserts a corresponding connect module in the design, for at least one circuit block having an unsupported signal declared in the power specification. Typically such a circuit block will be an analog block, whether an original analog block or an analog representation of a digital block, and may involve electrical or wreal signal interactions. The simulation tool performs a mixed-signal simulation of the design. Embodiments tangibly output a verification determination from a comparison of the simulated design performance results and the design specifications in order to provide the manufacturable description of the circuit.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: July 11, 2017
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Qingyu Lin, Nan Zhang
  • Patent number: 9141741
    Abstract: Some aspects are directed at methods and systems that directly specifies or uses standardized power data in standardized format(s) in various design tasks for implementing mixed-signal electronic designs by using native process(es) or module(s) of standardized power format framework(s) to evaluate legal signals or expressions to generate the first output and evaluation process(es) or module(s) to evaluate illegal signals or expressions to generate the second output for the design tasks, without using wrappers to encapsulate circuit blocks generating illegal signals and hence disrupt the original design hierarchical structures or using translators to translate illegal signals or expressions into corresponding legal signals or expressions for the standardized power format frameworks.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: September 22, 2015
    Assignee: Cadence Design Systems, Inc.
    Inventors: Qingyu Lin, Nan Zhang, Zhong Fan
  • Patent number: 9020797
    Abstract: A method is provided that comprises a circuit design that includes multiple design blocks; a power intent specification file that defines a power domain within the circuit design and that identifies design instances within the power domain and that defines a control function to selectively transition the defined power domain between multiple respective power supply values; using a digital simulator to simulate operation of the digital representation while using an analog simulator to simulate operation of the analog representation; wherein simulating the digital representation includes transitioning the defined power domain between supply values from among the multiple respective supply values; wherein simulating the analog representation includes periodically storing in a storage location a power supply value currently in use during digital simulation of the digital representation; and wherein simulating the analog representation includes using the stored currently in use power supply value to supply voltage
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: April 28, 2015
    Assignee: Cadence Design Systems, Inc.
    Inventors: Qingyu Lin, Prabal Kanti Bhattacharya, Nan Zhang, Zhong Fan
  • Publication number: 20130338991
    Abstract: A method is provided that comprises a circuit design that includes multiple design blocks; a power intent specification file that defines a power domain within the circuit design and that identifies design instances within the power domain and that defines a control function to selectively transition the defined power domain between multiple respective power supply values; using a digital simulator to simulate operation of the digital representation while using an analog simulator to simulate operation of the analog representation; wherein simulating the digital representation includes transitioning the defined power domain between supply values from among the multiple respective supply values; wherein simulating the analog representation includes periodically storing in a storage location a power supply value currently in use during digital simulation of the digital representation; and wherein simulating the analog representation includes using the stored currently in use power supply value to supply voltage
    Type: Application
    Filed: June 14, 2012
    Publication date: December 19, 2013
    Applicant: Cadence Design Systems, Inc.
    Inventors: Qingyu Lin, Prabal Kanti Bhattacharya, Nan Zhang, Zhong Fan