Patents by Inventor Qinwen Xu

Qinwen Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230090976
    Abstract: Provided are a bulk acoustic resonator and a filter. The bulk acoustic resonator includes a substrate having a cavity, and a bottom electrode, a piezoelectric layer and a top electrode that are sequentially arranged on the substrate, where an overlapping area of orthographic projections of the bottom electrode, the piezoelectric layer and the top electrode on the substrate forms a resonance area; and in the resonance area, an outline shape of the orthographic projection of each of the bottom electrode and the top electrode on the substrate is a closed figure formed by connecting M arcs end to end, and the closed figure is an axisymmetric figure, where M is an integer greater than or equal to 2, and the arcs include a concave arc that is concave toward a center of the resonance area and a convex arc that is convex away from the center of the resonance area.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 23, 2023
    Inventors: Chengliang SUN, Xiyu GU, Shishang GUO, Chao GAO, Yang ZOU, Qinwen XU
  • Patent number: 9547881
    Abstract: A method for calculating a feature descriptor on a single instruction, multiple data (SIMD) processor is described. The method includes generating histogram bin indexes in a first register. The method also includes generating weights in a second register. The method further includes updating an entire histogram table in a register file based on the histogram bin indexes and the weights without storing any histogram bin to memory. Histogram bins are updated in parallel with a single instruction.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: January 17, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Qinwen Xu, Bo Zhou, Shuxue Quan, Junchen Du
  • Publication number: 20160225119
    Abstract: A method for calculating a feature descriptor on a single instruction, multiple data (SIMD) processor is described. The method includes generating histogram bin indexes in a first register. The method also includes generating weights in a second register. The method further includes updating an entire histogram table in a register file based on the histogram bin indexes and the weights without storing any histogram bin to memory. Histogram bins are updated in parallel with a single instruction.
    Type: Application
    Filed: February 23, 2015
    Publication date: August 4, 2016
    Inventors: Qinwen Xu, Bo Zhou, Shuxue Quan, Junchen Du
  • Patent number: 9336579
    Abstract: A particular method includes generating a first result of a first integration operation performed on a first subset of elements of the plurality of elements. The first integration operation is associated with a first level of integration. The method includes generating a second result of a second integration operation performed on the first subset of elements. The second integration operation is associated with a second level of integration. The method further includes performing a third integration operation on a second subset of elements of the plurality of elements. The third integration operation is associated with the second level of integration. The third integration operation is performed based on the first result and the second result.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: May 10, 2016
    Assignee: Qualcomm Incorporated
    Inventors: Qinwen Xu, Bo Zhou, Shuxue Quan, Junchen Du
  • Publication number: 20150254824
    Abstract: A particular method includes generating a first result of a first integration operation performed on a first subset of elements of the plurality of elements. The first integration operation is associated with a first level of integration. The method includes generating a second result of a second integration operation performed on the first subset of elements. The second integration operation is associated with a second level of integration. The method further includes performing a third integration operation on a second subset of elements of the plurality of elements. The third integration operation is associated with the second level of integration. The third integration operation is performed based on the first result and the second result.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 10, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Qinwen Xu, Bo Zhou, Shuxue Quan, Junchen Du