Patents by Inventor Qipeng WU

Qipeng WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9880894
    Abstract: Examples for an intelligent watchdog timer for a computing device are described herein. The watchdog timer operates a watchdog counter that repetitively counts a watchdog count interval from an initial value to a final value. The watchdog counter is continually reset if the device is functioning properly. If the watchdog timer is allowed to reach a final count value, a processor reset is initiated. Several components operate to detect the current mode of operation of the processor or an operating system, and predict, in part based on user context, when different power states may occur. The components also forecast when the watchdog timer is scheduled to reach the final count value. Based on the forecasts of when the watchdog timer will reach the final count value and the predictions of future power states of the processor or operating system, the watchdog counter is selectively disabled or reset.
    Type: Grant
    Filed: July 8, 2015
    Date of Patent: January 30, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Bin Wang, Robert Yu Zhu, Qipeng Wu, Dejun Zhang, Pengxiang Zhao, Ying N. Chin
  • Publication number: 20170010933
    Abstract: Examples for an intelligent watchdog timer for a computing device are described herein. The watchdog timer operates a watchdog counter that repetitively counts a watchdog count interval from an initial value to a final value. The watchdog counter is continually reset if the device is functioning properly. If the watchdog timer is allowed to reach a final count value, a processor reset is initiated. Several components operate to detect the current mode of operation of the processor or an operating system, and predict, in part based on user context, when different power states may occur. The components also forecast when the watchdog timer is scheduled to reach the final count value. Based on the forecasts of when the watchdog timer will reach the final count value and the predictions of future power states of the processor or operating system, the watchdog counter is selectively disabled or reset.
    Type: Application
    Filed: July 8, 2015
    Publication date: January 12, 2017
    Inventors: Bin WANG, Robert Yu ZHU, Qipeng WU, Dejun ZHANG, Pengxiang ZHAO, Ying N. CHIN