Abstract: An embodiment of an integrated circuit may comprise first circuitry to manage a memory in accordance with a page size and a channel interleave granularity, and second circuitry coupled to the first circuitry, the second circuitry to store data in a primary region of the memory at a primary address, and manage a mirror of the data in a secondary region of the memory at a secondary address at a regional granularity on demand at run time. Other embodiments are disclosed and claimed.

Abstract: Apparatus, method, and system for efficiently identifying and tracking cold memory pages are disclosed. The apparatus in one embodiment includes one or more processor cores to access memory pages stored in the memory by issuing access requests to the memory and a page index bitmap to track accesses made by the one or more processor cores to the memory pages. The tracked accesses are usable to identify infrequently-accessed memory pages, where the infrequently-accessed memory pages are removed from the memory and stored in a secondary storage.

Abstract: An apparatus for efficiently identifying and tracking cold memory pages. The apparatus includes a memory to store memory pages, one or more processor cores to access the memory pages stored in the memory by issuing access requests to the memory; and a page index bitmap to track accesses made by the one or more processor cores to the memory pages stored in the memory. The tracked accesses are usable to identify infrequently-accessed memory pages, wherein the infrequently-accessed memory pages are removed from the memory and stored in a secondary storage.