Patents by Inventor Quan T. Nguyen
Quan T. Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7161409Abstract: A voltage reference circuit receives an input voltage through a first port and a time varying input signal through a second port. The voltage reference circuit includes a switching circuit that is responsive to the first and the second ports and that generates an AC signal from the input voltage. The voltage reference circuit further includes a voltage multiplier circuit, coupled to the switching circuit that receives the AC signal and creates a DC signal with a selected voltage level. The voltage reference circuit further includes a voltage regulator, coupled to the voltage multiplier circuit that regulates the DC signal from the voltage multiplier circuit. A regulated output voltage is provided through an output port.Type: GrantFiled: July 26, 2004Date of Patent: January 9, 2007Inventors: Douglas A. Scratchley, Quan T. Nguyen, Ernest Graetz
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Patent number: 7011531Abstract: A structure and method to establish an electrical connection between a tester and an electrical component. A flexible dielectric layer has a first side and a second side. A through via extends through the first side and the second side of the dielectric layer. A blind via is placed in a position that is offset from the through via and extends laterally in a first direction from a section of the first through via to a section of the flexible dielectric layer. The blind via extends in a second direction from the first side of the flexible dielectric layer to a section of the flexible dielectric layer that is between the first side and the second side of the dielectric layer. An electrically conductive member extends through the through via and extends into the blind via, thereby filling the through via and the blind via. The electrically conductive member has a first surface and a second surface.Type: GrantFiled: January 7, 2005Date of Patent: March 14, 2006Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Keith J. Miller, Manh-Quan T. Nguyen
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Patent number: 6955849Abstract: A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.Type: GrantFiled: May 26, 2004Date of Patent: October 18, 2005Assignee: International Business Machines CorporationInventors: Brian E. Curcio, Frank D. Egitto, Robert M. Japp, Thomas R. Miller, Manh-Quan T. Nguyen, Douglas O. Powell
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Patent number: 6881072Abstract: A structure and method to establish an electrical connection between a tester and an electrical component. A flexible dielectric layer has a first side and a second side. A through via extends through the first side and the second side of the dielectric layer. A blind via is placed in a position that is offset from the through via and extends laterally in a first direction from a section of the first through via to a section of the flexible dielectric layer. The blind via extends in a second direction from the first side of the flexible dielectric layer to a section of the flexible dielectric layer that is between the first side and the second side of the dielectric layer. An electrically conductive member extends through the through via and extends into the blind via, thereby filling the through via and the blind via. The electrically conductive member has a first surface and a second surface.Type: GrantFiled: October 1, 2002Date of Patent: April 19, 2005Assignee: International Business Machines CorporationInventors: Frank D. Egitto, Keith J. Miller, Manh-Quan T. Nguyen
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Patent number: 6790305Abstract: A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.Type: GrantFiled: October 8, 2002Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Brian E. Curcio, Frank D. Egitto, Robert M. Japp, Thomas R. Miller, Manh-Quan T. Nguyen, Douglas O. Powell
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Publication number: 20040067347Abstract: A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.Type: ApplicationFiled: October 8, 2002Publication date: April 8, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian E. Curcio, Frank D. Egitto, Robert M. Japp, Thomas R. Miller, Manh-Quan T. Nguyen, Douglas O. Powell
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Publication number: 20040063352Abstract: A structure and method to establish an electrical connection between a tester and an electrical component. A flexible dielectric layer has a first side and a second side. A through via extends through the first side and the second side of the dielectric layer. A blind via is placed in a position that is offset from the through via and extends laterally in a first direction from a section of the first through via to a section of the flexible dielectric layer. The blind via extends in a second direction from the first side of the flexible dielectric layer to a section of the flexible dielectric layer that is between the first side and the second side of the dielectric layer. An electrically conductive member extends through the through via and extends into the blind via, thereby filling the through via and the blind via. The electrically conductive member has a first surface and a second surface.Type: ApplicationFiled: October 1, 2002Publication date: April 1, 2004Applicant: International Business Machines CorporationInventors: Frank D. Egitto, Keith J. Miller, Manh-Quan T. Nguyen
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Patent number: 6518516Abstract: A multilayered laminate, substructures and associated methods of fabrication are presented. The multilayered laminate includes in sequential order: (a) a first intermediate layer having microvias and conductive lands; (b) a plurality of signal/power plane substructures, wherein a dielectric material of an intervening dielectric layer insulatively separates each pair of successive signal/power plane substructures and (c) a second intermediate layer having microvias and conductive lands.Type: GrantFiled: April 11, 2002Date of Patent: February 11, 2003Assignee: International Business Machines CorporationInventors: Kim J. Blackwell, Frank D. Egitto, Voya R. Markovich, Manh-Quan T. Nguyen, Douglas O. Powell, David L. Thomas
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Publication number: 20020108780Abstract: A multilayered laminate, substructures and associated methods of fabrication are presented. The multilayered laminate includes in sequential order: (a) a first intermediate layer having microvias and conductive lands; (b) a plurality of signal/power plane substructures, wherein a dielectric material of an intervening dielectric layer insulatively separates each pair of successive signal/power plane substructures and (c) a second intermediate layer having microvias and conductive lands.Type: ApplicationFiled: April 11, 2002Publication date: August 15, 2002Applicant: International Business Machines CorporationInventors: Kim J. Blackwell, Frank D. Egitto, Voya R. Markovich, Manh-Quan T. Nguyen, Douglas O. Powell, David L. Thomas