Patents by Inventor Quang Khanh Dinh

Quang Khanh Dinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-function input terminal of integrated circuits
    Patent number: 8159269
    Abstract: A single terminal is used to configure an integrated circuit into one of three states. A circuit within the integrated circuit is coupled to the terminal and determines whether the terminal: 1) is coupled by a low impedance to a voltage source, or 2) is coupled by a medium impedance to the voltage source, or 3) is floating or substantially floating. The circuit asserts a first digital logic signal when the circuit determines that the terminal is coupled by the low impedance to the voltage source. The circuit asserts a second digital logic signal when the circuit determines that the terminal is coupled by the medium impedance to the voltage source. The circuit asserts a third digital logic signal when the circuit determines that the terminal is floating or substantially floating. The terminal and circuit are particular suited for use in a Power Management Unit (PMU) Integrated Circuit.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: April 17, 2012
    Assignee: Active-Semi, Inc.
    Inventors: Quang Khanh Dinh, Gary M. Hurtz, Steven Huynh
  • Multi-function input terminal of integrated circuits
    Publication number: 20100001761
    Abstract: A single terminal is used to configure an integrated circuit into one of three states. A circuit within the integrated circuit is coupled to the terminal and determines whether the terminal: 1) is coupled by a low impedance to a voltage source, or 2) is coupled by a medium impedance to the voltage source, or 3) is floating or substantially floating. The circuit asserts a first digital logic signal when the circuit determines that the terminal is coupled by the low impedance to the voltage source. The circuit asserts a second digital logic signal when the circuit determines that the terminal is coupled by the medium impedance to the voltage source. The circuit asserts a third digital logic signal when the circuit determines that the terminal is floating or substantially floating. The terminal and circuit are particular suited for use in a Power Management Unit (PMU) Integrated Circuit.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 7, 2010
    Inventors: Quang Khanh Dinh, Gary M. Hurtz, Steven Huynh