Patents by Inventor Quang Le

Quang Le has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250148274
    Abstract: The present disclosure generally relates to a deep neural network (DNN) device utilizing spin orbital-spin orbital (SO-SO) devices. The SO-SO devices each includes two SOT layers, a first spin orbit torque (SOT1) layer, a second spin orbit torque (SOT2) layer, and a ferromagnetic layer disposed between the SOT1 and SOT2 layer. Each SO-SO device further comprises three terminals, one per each SOT layer, for in plane current flow to or from the respective SOT layer, and one for perpendicular current flow through multiple layers, or the overall stack, of the SO-SO device. The SO-SO device thus efficiently provides spin-to-charge and charge-to-spin mechanisms in the same device, and can be flexibility configured to perform various functions of a neural node of a DNN. These functions include storing programmed weights, multiplying inputs and weights and summing such multiplication results, and performing an activation function to determine a neural node output.
    Type: Application
    Filed: April 24, 2024
    Publication date: May 8, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Xiaoyong LIU, Brian R. YORK, Hisashi TAKANO, Nam Hai PHAM
  • Publication number: 20250095673
    Abstract: The present disclosure generally relates to a magnetic recording head comprising one or more spin-orbit torque (SOT) devices, the SOT devices each comprising a bismuth antimony (BiSb) layer. The magnetic recording head comprises a SOT device comprising a first shield extending to a media facing surface (MFS), a seed layer disposed over the first shield, the seed layer being disposed at the MFS, a free layer disposed on the seed layer, the free layer being disposed at the MFS, a bismuth antimony (BiSb) layer disposed over the free layer, the BiSb layer being recessed from the MFS, a second shield disposed over the BiSb layer, the second shield extending to the MFS, and a shield notch coupled to the second shield, the shield notch being disposed between the first shield and the second shield. The magnetic recording head may be a two-dimensional magnetic recording head comprising two SOT devices.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Xiaoyong LIU, Fan TUO, Brian R. YORK, Cherngye HWANG, Hisashi TAKANO
  • Patent number: 12254655
    Abstract: Computing devices, such as mobile computing devices, have access to one or more image sensors that can capture images and video with multiple subjects. Some of these subjects may vary in priority for various tasks. It may be desired to increase or decrease the compression on each subject in order to more efficiently store the image data. Low-power, fast-response machine learning logic can be configured to allow for the generation of a plurality of inference data. Inference data can be associated with the type, motion and/or priority of the subjects as desired. This inference data can be utilized along with other subject data to generate one or more variable compression regions within the image data. The image data can be subsequently processed to compress different areas of the image based on a desired application. The variably compressed image can reduce file sizes and allow for more efficient storage and processing.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: March 18, 2025
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Rajeev Nagabhirava, Kuok San Ho, Daniel Bai, Xiaoyong Liu
  • Publication number: 20250077834
    Abstract: The present disclosure is generally related to a deep neural network (DNN) device comprising a plurality of spin-orbit torque (SOT) cells. The DNN device comprises an array comprising n rows and m columns of nodes, each row of nodes coupled to one of n first conductive lines, each column of nodes coupled to one of m second conductive lines, each node of the n rows and m columns of nodes comprising a plurality of SOT cells, each SOT cell comprising: at least one SOT layer, at least one ferromagnetic (FM) layer, and a controller configured to store at least one corresponding weight of an n×m array of weights of a neural network in each of the SOT cell. The FM layer may comprise two or more domains, two or more elliptical arms, or two or more states.
    Type: Application
    Filed: November 20, 2024
    Publication date: March 6, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Xiaoyong LIU, Lei XU, Brian R. YORK, Cherngye HWANG, Hisashi TAKANO
  • Publication number: 20250054671
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.
    Type: Application
    Filed: October 31, 2024
    Publication date: February 13, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
  • Publication number: 20250014618
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a doped bismuth antimony (BiSbE) layer having a (012) orientation. The devices may include magnetic write heads, read heads, or MRAM devices. The dopant in the BiSbE layer enhances the (012) orientation. The BiSbE layer may be formed on a texturing layer to ensure the (012) orientation, and a migration barrier may be formed over the BiSbE layer to ensure the antimony does not migrate through the structure and contaminate other layers. A buffer layer and interlayer may also be present. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the doped BiSbE layer and enhance uniformity of the doped BiSbE layer while further promoting the (012) orientation of the doped BiSbE layer.
    Type: Application
    Filed: September 19, 2024
    Publication date: January 9, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Cherngye HWANG, Brian R. YORK, Randy G. SIMMONS, Xiaoyong LIU, Kuok San HO, Hisashi TAKANO, Michael A. GRIBELYUK, Xiaoyu XU
  • Publication number: 20250014595
    Abstract: The present disclosure generally relates to a bismuth antimony (BiSb) based STO (spin torque oscillator) sensor. The STO sensor comprises a SOT device and a magnetic tunnel junction (MTJ) structure. By utilizing a BiSb layer within the SOT device, a larger spin Hall angle (SHA) can be achieved, thereby improving the efficiency and reliability of the STO sensor.
    Type: Application
    Filed: September 23, 2024
    Publication date: January 9, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Xiaoyong LIU, Zhanjie LI, Quang LE, Brian R. YORK, Cherngye HWANG, Kuok San HO, Hisashi TAKANO
  • Publication number: 20250006221
    Abstract: The present disclosure generally relates to a magnetic media drive comprising a magnetic recording head. The magnetic recording head comprises a main pole disposed at a media facing surface (MFS), a shield disposed at the MFS, a spin blocking layer disposed between the shield and the main pole, at least one non-magnetic layer disposed between the main pole and the shield, the at least one non-magnetic layer being disposed at the MFS, and at least one spin orbit torque (SOT) layer disposed over the at least one non-magnetic layer, the SOT layer being recessed a distance of about 20 nm to about 100 nm from the MFS. A ratio of a length of the SOT layer to a thickness of the SOT layer is greater than 1. The at least one SOT layer comprises BiSb.
    Type: Application
    Filed: August 3, 2023
    Publication date: January 2, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Xiaoyong LIU, Cherngye HWANG, Brian R. YORK, Son T. LE, Sharon Swee Ling BANH, Maki MAEDA, Fan TUO, Yu TAO, Hisashi TAKANO, Nam Hai PHAM
  • Publication number: 20240428820
    Abstract: The present disclosure generally relates to a magnetic recording head comprising a read head. The read head comprises a first sensor disposed at a media facing surface (MFS) comprising at least one free layer, a second sensor disposed at the MFS comprising at least one free layer, a first spin generator spaced from the first sensor and recessed from the MFS, and a second spin generator spaced from the second sensor and recessed from the MFS. The first and second spin generators each individually comprises at least one spin orbit torque (SOT) layer. The SOT layer may comprise BiSb. The first and second sensors are configured to detect a read signal using a first voltage lead and a second voltage lead. The first and second spin generators are configured to inject spin current through non-magnetic layers to the first and second sensors using a plurality of current leads.
    Type: Application
    Filed: September 13, 2023
    Publication date: December 26, 2024
    Applicants: Western Digital Technologies, Inc., Tokyo Institute of Technology
    Inventors: Quang LE, Xiaoyong LIU, Brian R. YORK, Cherngye HWANG, Son T. LE, Hisashi TAKANO, Fan TUO, Hassan OSMAN, Nam Hai PHAM
  • Patent number: 12176132
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 24, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Cherngye Hwang, Xiaoyong Liu, Michael A. Gribelyuk, Xiaoyu Xu, Randy G. Simmons, Kuok San Ho, Hisashi Takano
  • Publication number: 20240423098
    Abstract: The present disclosure generally relate to an integrated circuit utilizing spin orbital-spin orbital (SO-SO) logic. The integrated circuit comprises a plurality of SO-SO logic cells, where each SO-SO logic cell comprises a first spin orbit torque (SOT1) layer, a second spin orbit torque (SOT2) layer, and a ferromagnetic layer disposed between the SOT1 and SOT2 layer. Each SO-SO logic cell is configured for: a first current path that is in plane to a plane of the SOT1 layer, and a second current path that is perpendicular to a plane of the SOT2 layer, the second current path being configured to extend into the ferromagnetic layer. The integrated circuit further comprises a common voltage source connected to each SOT device, and one or more interconnects disposed between adjacent SOT devices of the plurality of SOT devices, the one or more interconnects connecting the adjacent SOT devices together.
    Type: Application
    Filed: April 24, 2024
    Publication date: December 19, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Xiaoyong LIU, Brian R. YORK, Cherngye HWANG, Hisashi TAKANO, Nam Hai PHAM
  • Publication number: 20240420732
    Abstract: The present disclosure generally relates to a magnetic recording head comprising a read head. The read head comprises a sensor disposed at a media facing surface (MFS) and a spin generator spaced from the sensor and recessed from the MFS. The sensor and spin generators are disposed on a non-magnetic layer. The sensor comprises a free layer and the spin generator comprises at least one spin orbit torque (SOT) layer. The SOT layer may comprise topological material such as BiSb. The sensor is configured to detect a read signal using a first voltage lead and a second voltage lead. The spin generator is configured to inject spin current through the non-magnetic layer to the sensor using a first current lead and a second current lead. The shape of the non-magnetic layer is a triangular or trapezoidal shape to further concentrate spin current.
    Type: Application
    Filed: September 13, 2023
    Publication date: December 19, 2024
    Applicants: Western Digital Technologies, Inc., Tokyo Institute of Technology
    Inventors: Quang LE, Xiaoyong LIU, Brian R. YORK, Cherngye HWANG, Son T. LE, Hisashi TAKANO, Fan TUO, Hassan OSMAN, Nam Hai PHAM
  • Publication number: 20240420733
    Abstract: The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and/or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO (100), TiN (100), Ta, Nb, HfN, Ta3W2 (110), TaW2 (100), Ta3W2N, TaW2N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta3WN, TaW3N, Ta3W (110), TaW3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.
    Type: Application
    Filed: June 11, 2024
    Publication date: December 19, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Sharon Swee Ling BANH, Hassan OSMAN, Hisashi TAKANO
  • Publication number: 20240412759
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a bismuth antimony (BiSb) layer. The SOT device comprises a seed layer and a BiSb layer having a (012) orientation. The seed layer comprises at least one of an amorphous/nanocrystalline material with a nearest neighbor x-ray diffraction peak with a d-spacing in the range of about 2.02 ? to about 2.20 ?; a polycrystalline material having a (111) orientation and an a-axis of about 3.53 ? to about 3.81 ?; and a polycrystalline material having a cubic (100) or tetragonal (001) orientation and an a-axis of about 4.1 ? to about 4.7 ?. When the seed layer comprises an amorphous material or a polycrystalline material having a (111), the BiSb layer is doped, and the seed layer has a lower a/c ratio than when the seed layer comprises polycrystalline material having a cubic (100) or tetragonal (001) orientation.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 12, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Son T. LE, Hisashi TAKANO
  • Patent number: 12154603
    Abstract: The present disclosure generally relates to a magnetic recording head comprising a spintronic device for magnetic media, such as a magnetic media drive. The spintronic device includes at least one spin Hall layer as well as at least one buffer layer and at least one interlayer. The buffer layer is positioned proximate a main pole of a write head while the interlayer is positioned proximate a trailing shield of the write head. The spin Hall layer is positioned between the buffer layer and the interlayer. The spintronic element may be disposed at the media facing surface (MFS) or recessed from the MFS. The spintronic device is capable of injecting spin current to the main pole, the trailing shield, or both.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: November 26, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Xiaoyong Liu, Cherngye Hwang, Hassan Osman, Hisashi Takano, Nam Hai Pham
  • Patent number: 12136446
    Abstract: The present disclosure generally relates to a two dimensional magnetic recording (TDMR) spin-orbit torque (SOT) read head comprising bismuth antimony (BiSb) layers. The read head comprises a lower reader comprising a first SOT stack and an upper reader comprising a second SOT stack. The first SOT stack and the second SOT stack each individually comprise a BiSb layer recessed from a media facing surface (MFS) and a free layer exposed at the MFS. The BiSb layers of each SOT stack are recessed from the MFS a distance of about 5 nm to about 20 nm, the distance being less than a length of the free layers. In one embodiment, the lower reader and the upper reader share a current path. In another embodiment, the lower reader and the upper reader have separate current paths.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: November 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Rohan Babu Nagabhirava, Xiaoyong Liu, Brian R. York, Son T. Le, Cherngye Hwang, Kuok San Ho, Hisashi Takano
  • Patent number: 12125512
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a doped bismuth antimony (BiSbE) layer having a (012) orientation. The devices may include magnetic write heads, read heads, or MRAM devices. The dopant in the BiSbE layer enhances the (012) orientation. The BiSbE layer may be formed on a texturing layer to ensure the (012) orientation, and a migration barrier may be formed over the BiSbE layer to ensure the antimony does not migrate through the structure and contaminate other layers. A buffer layer and interlayer may also be present. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the doped BiSbE layer and enhance uniformity of the doped BiSbE layer while further promoting the (012) orientation of the doped BiSbE layer.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: October 22, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Cherngye Hwang, Brian R. York, Randy G. Simmons, Xiaoyong Liu, Kuok San Ho, Hisashi Takano, Michael A. Gribelyuk, Xiaoyu Xu
  • Patent number: 12125508
    Abstract: The present disclosure generally relates to a bismuth antimony (BiSb) based STO (spin torque oscillator) sensor. The STO sensor comprises a SOT device and a magnetic tunnel junction (MTJ) structure. By utilizing a BiSb layer within the SOT device, a larger spin Hall angle (SHA) can be achieved, thereby improving the efficiency and reliability of the STO sensor.
    Type: Grant
    Filed: September 11, 2023
    Date of Patent: October 22, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Xiaoyong Liu, Zhanjie Li, Quang Le, Brian R. York, Cherngye Hwang, Kuok San Ho, Hisashi Takano
  • Patent number: 12106791
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprise one or more GeXNiFe layers, where at least one GeXNiFe layer is disposed in contact with the BiSb layer. The GeXNiFe layer has a thickness less than or equal to about 15 ? when used as an interlayer on top of the BiSb layer or less than or equal to 40 ? when used as a buffer layer underneath the BiSb. When the BiSb layer is doped with a dopant comprising a gas, a metal, a non-metal, or a ceramic material, the GeXNiFe layer promotes the BiSb layer to have a (012) orientation. When the BiSb layer is undoped, the GeXNiFe layer promotes the BiSb layer to have a (001) orientation. Utilizing the GeXNiFe layer allows the crystal orientation of the BiSb layer to be selected.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: October 1, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Cherngye Hwang, Xiaoyong Liu, Michael A. Gribelyuk, Xiaoyu Xu, Susumu Okamura, Kuok San Ho, Hisashi Takano, Randy G. Simmons
  • Patent number: 12100057
    Abstract: A computer-implemented method and system manages and processes outstanding invoices within various accounting software applications. The method includes analyzing a web page to identify a unique invoice identifier (e.g., within the web page's URL or a user interface element of the web page), obtaining additional invoice information from the accounting system based on the unique invoice identifier, and displaying this information in a user-friendly interface. A web browser plugin facilitates real-time data synchronization and payment processing by interacting with the accounting system through an API. The system streamlines the payment process by reducing the number of steps required, improving the efficiency and accuracy of financial transactions. The system is designed to be compatible with multiple accounting systems and web browsers, ensuring broad applicability and ease of use.
    Type: Grant
    Filed: March 6, 2024
    Date of Patent: September 24, 2024
    Assignee: Skyline Payment Systems, LLC
    Inventors: Phong Quang Le, Long Quang Le