Abstract: The present disclosure relates to methods and apparatus for graphics processing. For example, disclosed techniques facilitate improving bindless state processing at a graphics processor. Aspects of the present disclosure can receive, at a graphics processor, a shader program including a preamble section and a main instructions section. Aspects of the present disclosure can also execute, with a scalar processor dedicated to processing preamble sections, instructions of the preamble section to implement a bindless mechanism for loading constant data associated with the shader program. Additionally, aspects of the present disclosure can distribute the main instructions section and the constant data to a streaming processor for executing the shader program.

Abstract: The present disclosure relates to methods and apparatus for graphics processing. For example, disclosed techniques facilitate improving bindless state processing at a graphics processor. Aspects of the present disclosure can receive, at a graphics processor, a shader program including a preamble section and a main instructions section. Aspects of the present disclosure can also execute, with a scalar processor dedicated to processing preamble sections, instructions of the preamble section to implement a bindless mechanism for loading constant data associated with the shader program. Additionally, aspects of the present disclosure can distribute the main instructions section and the constant data to a streaming processor for executing the shader program.

Abstract: An electronic device, for integration with functional circuit modules, includes gates, monitor module, signal control module and record module. The functional modules are operated on clock signal for generating request instruction and response signal. The gate is coupled to the functional modules for transmitting request instruction and response signal to functional module on enable signals. The monitor module is coupled to the functional modules and the gates for generating hold signal. The monitor module generates enable signals on finish signal. The clock signal control module coupled to the functional modules and the monitor module for outputs main clock signal to generate clock signals. The clock signal control module generates record instruction and stop clock signals, and the clock signal control module re-outputs clock signals on finish signal.

Abstract: An electronic device includes functional modules, gates, monitor module, signal control module and record module. The functional modules are operated on clock signal for generating request instruction and response signal. The gate is coupled to the functional modules for transmitting request instruction and response signal to functional module on enable signals. The monitor module is coupled to the functional modules and the gates for generating hold signal. The monitor module generates enable signals on finish signal. The clock signal control module coupled to the functional modules and the monitor module for outputs main clock signal to generate clock signals. The clock signal control module generates record instruction and stop clock signals, and the clock signal control module re-outputs clock signals on finish signal. The record module coupled to the functional modules and the clock signal control module begins to record request instruction and response signal when receiving record instruction.