Abstract: A display substrate is disclosed, including a display area and a non-display area. The non-display area has a gate drive circuit including multiple cascaded shift register units. A shift register unit includes an input control circuit and an output circuit. The input control circuit is electrically connected to a clock signal line group, a first power supply line, a second power supply line and an output circuit, the output circuit is electrically connected to the first power supply line and a second power supply line. The input control circuit at least includes an input circuit and a first control circuit. The clock signal line group, the second power supply line, the input control circuit, the output circuit and the first power supply line are arranged sequentially along a first direction. The input circuit is located between the second power supply line and the first control circuit in the first direction.

Abstract: A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

Abstract: A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

Abstract: A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

Abstract: A displaying base board includes an active area and a peripheral region, the peripheral region includes at least a first blocking part and a second blocking part; the peripheral region further includes a first power-supply signal line, and an orthographic projection of the first power-supply signal line on a substrate of the displaying base board has an overlapping part with individually an orthographic projection of the first blocking part on the substrate and an orthographic projection of the second blocking part on the substrate; and the first power-supply signal line is provided with a plurality of openings, and a region enclosed by orthographic projections on the substrate of outer contours of some of the openings falls within a region of the orthographic projection on the substrate of at least one of the first blocking part and the second blocking part.

Abstract: A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of pixel circuits, the plurality of pixel circuits are arranged on the base substrate in an array, the plurality of pixel circuits include a plurality of active patterns, each of the plurality of active patterns extends along a first direction, the plurality of active patterns are arranged along a second direction, adjacent active patterns are spaced apart from each other in the second direction, and at least one of the plurality of active patterns comprises at least one disconnection position to form a plurality of active sub-patterns independent of each other.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided.

Abstract: A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Abstract: A pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a light-emitting element, a driving circuit, and a data writing circuit; the data writing circuit is electrically connected to a first scanning terminal, a data line and a first terminal of the driving circuit, and is configured to write a data voltage provided by the data line into the first terminal of the driving circuit under control of a first scanning signal provided by the first scanning terminal during a data writing phase included in a refresh frame, and write a reset voltage provided by the data line into the first terminal of the driving circuit under control of the first scanning signal during a reset phase included in a hold frame; the driving circuit is configured to drive the light-emitting element under control of a potential of a control terminal thereof.

Abstract: Display substrate, method for manufacturing the same, and display device are disclosed. The display substrate comprises: a base substrate comprising a display region and a peripheral region located at a periphery of the display region, the display region comprises at least two display sub-regions; the display substrate further comprises scanning lines and sub-pixels, wherein the scanning lines comprise first scanning lines comprising at least two scanning line segments independent from each other, and the at least two scanning line segments are located in different display sub-regions; and the sub-pixels are divided into rows of sub-pixels, the rows of sub-pixels comprise a target row of sub-pixels which is divided into at least two sub-pixel groups located in different display sub-regions, and the scanning line segment is coupled to each sub-pixel in a corresponding sub-pixel group belonging to a same display sub-region.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.

Abstract: Provided are a display panel, a manufacturing method, and a display device. The display panel includes: a substrate including a display area and a peripheral area; a driving circuit layer including: a pixel circuit in the display area, and a gate driver circuit on a side of the pixel circuit in proximity to the peripheral area, and at least partially in the display area; a first metal layer on a side of the driving circuit layer away from the substrate, insulated from the driving circuit layer; and a first electrode layer in the display area and on a side of the first metal layer away from the substrate, insulated from the first metal layer, and electrically connected to the pixel circuit; where orthographic projections, on the substrate, of the first electrode layer, the first metal layer, and the gate driver circuit, are at least partially overlapped.

Abstract: A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

Abstract: An array substrate is provided. The array substrate includes K number of columns of first pads. A respective first pad is connected to an anode of a light emitting element, a second electrode of a fifth transistor, and a second electrode of a sixth transistor. The K number of columns of first pads include a plurality of first-first pads in (2k-1)-th columns of the K columns and a plurality of second-first pads in (2k)-th columns of the K columns. A respective first-first pad and a respective second-first pad have different average line widths.

Abstract: A display substrate, and a display apparatus corresponding thereto and a manufacturing method therefor. The display substrate comprises: a display region and a non-display region, wherein the non-display region is provided with a gate driving circuit, which comprises a plurality of cascaded shift register units. Each shift register unit comprises: an input circuit (10), a first control circuit (11), a second control circuit (12) and an output circuit (15), wherein the first control circuit (11) is located between the input circuit (10) and the output circuit (15) in a first direction, and the first control circuit (11) is arranged in the first direction; and the second control circuit (12) is adjacent to the first control circuit (11) in a second direction; the first direction intersects with the second direction.

Abstract: A display substrate is disclosed, including a display area and a non-display area. The non-display area has a gate drive circuit including multiple cascaded shift register units. A shift register unit includes an input control circuit and an output circuit. The input control circuit is electrically connected to a clock signal line group, a first power supply line, a second power supply line and an output circuit, the output circuit is electrically connected to the first power supply line and a second power supply line. The input control circuit at least includes an input circuit and a first control circuit. The clock signal line group, the second power supply line, the input control circuit, the output circuit and the first power supply line are arranged sequentially along a first direction. The input circuit is located between the second power supply line and the first control circuit in the first direction.