Abstract: A level shifter, configured to shift an input voltage swing from a first voltage range to a second voltage range, comprising a first stage and a switching stage, with circuitry configured in isolation wells. The first stage includes a first stage input receiving an input signal that swings between a first voltage value and a second voltage, a buffer configured to shift the input signal to vary between a third value and a fourth value, and a first stage output configured to present a first stage output signal. The switching stage comprises switching stage inputs, configured to receive the first stage output signal, switch drivers, and switching devices configured to, responsive to the driver output, generate a switching stage output signal that is a shifted version of the input signal. The switching stage output signal ranges between a fifth voltage value and a sixth voltage value.

Abstract: The present disclosure relates to optical phase modulation devices. The optical phase modulation devices may include a heater resistance which induces a phase change and control systems and methods of controlling the induced phase change.

Abstract: A method and system for controlling duty cycle distortion in a signal. The system includes an input configured to receive a square wave input signal and a filter configured to transform the square wave input signal into a signal with sloped transitions. One or more linear buffers introduce duty cycle distortion into the signal based on a duty cycle distortion signal to create a duty cycle distorted signal. One or more output buffers receive and transform the duty cycle distorted signal into a distorted square wave signal. A feedback loop receives the distorted square wave signal and compares it to a duty cycle distortion control signal to generate an error signal, which indicates the difference between the square wave signal and the desired output duty cycle. The error signal is converted to the duty cycle distortion signal and presented to the one or more linear buffers.

Abstract: A cable equalizer configured as part of a cable comprising a first stage, a second stage, and a third stage. The first stage comprises a first stage bias current circuit configured to generate a bias current and a pre-emphasis module configured to introduce pre-emphasis into a received signal to counter the effects of signal amplification. Also part of the first stage is a bias voltage circuit configured to provide a bias voltage to the first stage. The second stage comprises a buffer configured impedance match the first stage. The third stage comprises a third stage bias current circuit configured to generate a bias current and a tank equalizer circuit configured to perform frequency specific equalization on a second stage signal. An amplifier is configured to amplify the second stage signal to create an amplified signal, which is output from the cable equalizer by an output driver.

Abstract: A cable equalizer configured as part of a cable comprising a first stage, a second stage, and a third stage. The first stage comprises a first stage bias current circuit configured to generate a bias current and a pre-emphasis module configured to introduce pre-emphasis into a received signal to counter the effects of signal amplification. Also part of the first stage is a bias voltage circuit configured to provide a bias voltage to the first stage. The second stage comprises a buffer configured impedance match the first stage. The third stage comprises a third stage bias current circuit configured to generate a bias current and a tank equalizer circuit configured to perform frequency specific equalization on a second stage signal. An amplifier is configured to amplify the second stage signal to create an amplified signal, which is output from the cable equalizer by an output driver.

Abstract: An analog to digital converter temperature compensation system comprising a comparator configured to compare an analog input signal to a compensated feedback signal and generate a comparator output. A SAR module processes the comparator output to generate a digital signal. A digital to analog converter, biased by a biasing signal having temperature change induced error, is configured to convert the digital signal to a feedback signal and a detector is configured to detect a signal that is proportional to temperature. A look-up table is configured to receive and convert the signal that is proportional to temperature to a compensation signal such that the compensation signal compensates for the temperature change induced error in the biasing signal. A summing node combines the feedback signal with the compensation signal to create a compensated feedback signal.

Abstract: A method and system for controlling duty cycle distortion in a signal. The system includes an input configured to receive a square wave input signal and a filter configured to transform the square wave input signal into a signal with sloped transitions. One or more linear buffers introduce duty cycle distortion into the signal based on a duty cycle distortion signal to create a duty cycle distorted signal. One or more output buffers receive and transform the duty cycle distorted signal into a distorted square wave signal. A feedback loop receives the distorted square wave signal and compares it to a duty cycle distortion control signal to generate an error signal, which indicates the difference between the square wave signal and the desired output duty cycle. The error signal is converted to the duty cycle distortion signal and presented to the one or more linear buffers.

Abstract: The present disclosure relates to optical phase modulation devices. The optical phase modulation devices may include a heater resistance which induces a phase change and control systems and methods of controlling the induced phase change.

Abstract: A power control system comprising a laser driver that receives a data signal, and responsive to a modulation control signal and a bias control signal, processes the data signal to drive a laser to generate an optic signal that represents the data signal. A monitor photodiode configured to receive the optic signal and generate a monitor photodiode signal. A modulation control path, that processes a monitor photodiode signal and a reference signal, including at least one filter and at least one mixer. The modulation control path generates a modulation control signal. A bias control path, that processes the monitor photodiode signal and the reference signal, that includes at least one filter and at least one average weighting module to generate a modulation control signal. The bias control path and the modulation control path processing reduces the effect of the error in the monitor photodiode signal.

Abstract: An optic signal transmit system and biasing method and apparatus and system is disclosed to reduce power consumption during non-transmit periods. An optic signal generator receives a bias signal and an outgoing signal. A burst/transmit enable signal enables the transmit system into transmit mode, such as during a transmit window in a time multiplexed environment such as PON networks. A bias circuit biases the driver and/or optic signal generator. To realize power savings, the bias circuit includes one or more stages which are selectively enabled to adequately bias the driver and optic signal generator during transmit windows but disabled during periods when the system is not transmitting. The bias circuit may comprise a current mirror with a reference device, a fixed device, and switched device, which is selectively included in the circuit by a bias switch. The bias switch is responsive to a burst/transmit enable signal or a signal related thereto.

Abstract: An optic signal transmit system and biasing method and apparatus and system is disclosed to reduce power consumption during non-transmit periods. An optic signal generator receives a bias signal and an outgoing signal. A burst/transmit enable signal enables the transmit system into transmit mode, such as during a transmit window in a time multiplexed environment such as PON networks. A bias circuit biases the driver and/or optic signal generator. To realize power savings, the bias circuit includes one or more stages which are selectively enabled to adequately bias the driver and optic signal generator during transmit windows but disabled during periods when the system is not transmitting. The bias circuit may comprise a current mirror with a reference device, a fixed device, and switched device, which is selectively included in the circuit by a bias switch. The bias switch is responsive to a burst/transmit enable signal or a signal related thereto.