Abstract: A method and apparatus for providing a low power mode for a processor while maintaining snoop throughput are disclosed. In one embodiment, an apparatus includes a cache, a processor, and a frequency controller. The frequency controller is to operate the apparatus in a low power mode in which the operating frequency of the cache is higher than the operating frequency of the processor.

Abstract: Techniques for using a dirty line hint array when flushing a cache are disclosed. In one embodiment, an apparatus includes a number of hint bits. Each hint bit corresponds to a number of cache lines, and indicates whether at least one of those cache lines is dirty.

Abstract: Elements of a computer system are tested by generating harassing transactions on a bus. A first transaction is detected on the bus. The first transaction including a first data request to a first address. In response to and based upon detecting the first address, a second data request is generated to a second address. The second data request is issued on the bus as a second transaction while the first transaction is pending on the bus.

Abstract: Scalable disambiguating accesses in multi-level cache hierarchies provides for improved system performance and reduced cost. Shared-storage provides portions to hold data and portions to hold corresponding status encodings. Status encodings provide information to disambiguate data requests to shared-storege without resorting to prior methods of snooping or transmitting backward status-inquiries to private-storage. Shared-storage transmits data in response to requests if its status encodings indicate no private copies of the requested data have been modified. Shared storage transmits data requests to private storage if corresponding status encodings indicate that copies of requested data in private storage have been modified. Private-storage provides coherent copies, and shared-storage proceeds to satisfy the requests. If requests indicate a need to modify data, shared storage provides invalidation transmissions to private storage holding copies of relevant data.

Abstract: Methods and apparatus to detect memory address conflicts are disclosed. When a new cache line is allocated, the cache places the location where the cache line will be placed in a “pending” state until the cache line is retrieved. If a subsequent memory request is looking for an address in the pending cache line, that request is held back (e.g., delayed or replayed), until the cache line fill is complete and the “pending” status is removed. In this manner, the “pending” state, typically used to reserve cache locations, is also used to detect address conflicts.

Abstract: Scalable disambiguating accesses in multi-level cache hierarchies provides for improved system performance and reduced cost. Shared-storage provides portions to hold data and portions to hold corresponding status encodings. Status encodings provide information to disambiguate data requests to shared-storege without resorting to prior methods of snooping or transmitting backward status-inquiries to private-storage. Shared-storage transmits data in response to requests if its status encodings indicate no private copies of the requested data have been modified. Shared storage transmits data requests to private storage if corresponding status encodings indicate that copies of requested data in private storage have been modified. Private-storage provides coherent copies, and shared-storage proceeds to satisfy the requests. If requests indicate a need to modify data, shared storage provides invalidation transmissions to private storage holding copies of relevant data.

Abstract: Scalable disambiguating accesses in multi-level cache hierarchies provides for improved system performance and reduced cost. Shared-storage provides portions to hold data and portions to hold corresponding status encodings. Status encodings provide information to disambiguate data requests to shared-storage without resorting to prior methods of snooping or transmitting backward status-inquiries to private-storage. Shared-storage transmits data in response to requests if its status encodings indicate no private copies of the requested data have been modified. Shared storage transmits data requests to private storage if corresponding status encodings indicate that copies of requested data in private storage have been modified. Private-storage provides coherent copies, and shared-storage proceeds to satisfy the requests. If requests indicate a need to modify data, shared storage provides invalidation transmissions to private storage holding copies of relevant data.

Abstract: A system and method for reducing the number of writeback operations performed by level two (L2) or higher level cache memories in a microprocessor system having an integrated hierarchical cache structure. Writeback operations of modified victim lines in L2 or higher level caches are cancelled if an associated cache line, having a "modified" status, is located in a lower level cache. In one embodiment of the present invention, writeback operations of modified victim lines in L2 or higher level caches are also cancelled if an associated cache line, having a "clean" status, is located in a lower level cache.