Patents by Inventor Qunfeng Liao

Qunfeng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8817029
    Abstract: A graphics pipeline configured to synchronize data processing according to signals and tokens has at least four components. The first component has one input and one output and communicates output tokens or wire signals after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The second component has one input and a plurality of outputs and communicates tokens or wire signals on one of the outputs after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The third component has a plurality of inputs and one output and communicates tokens or wire signals on the output after receiving tokens on one of the inputs, an internal event occurrence, or receipt of a signal on an input path. The fourth component has a plurality of inputs and a plurality of outputs and has the capabilities of both the third and forth components.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: August 26, 2014
    Assignee: Via Technologies, Inc.
    Inventors: John Brothers, Timour Paltashev, Hsilin Huang, Qunfeng Liao
  • Publication number: 20070091102
    Abstract: A method for high level synchronization between an application and a graphics pipeline comprises receiving an application instruction in an input stream at a predetermined component, such as a command stream processor (CSP), as sent by a central processing unit. The CSP may have a first portion coupled to a next component in the graphics pipeline and a second portion coupled to a plurality of components of the graphics pipeline. A command associated with the application instruction may be forwarded from the first portion to the next component in the graphics pipeline or some other component coupled thereto. The command may be received and thereafter executed. A response may be communicated on a feedback path to the second portion of the CSP. Nonlimiting exemplary application instructions that may be received and executed by the CSP include check surface fault, trap, wait, signal, stall, flip, and trigger.
    Type: Application
    Filed: October 25, 2006
    Publication date: April 26, 2007
    Inventors: John Brothers, Timour Paltashev, Hsilin Huang, Boris Prokopenko, Qunfeng Liao
  • Publication number: 20070091100
    Abstract: A graphics pipeline configured to synchronize data processing according to signals and tokens has at least four components. The first component has one input and one output and communicates output tokens or wire signals after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The second component has one input and a plurality of outputs and communicates tokens or wire signals on one of the outputs after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The third component has a plurality of inputs and one output and communicates tokens or wire signals on the output after receiving tokens on one of the inputs, an internal event occurrence, or receipt of a signal on an input path. The fourth component has a plurality of inputs and a plurality of outputs and has the capabilities of both the third and forth components.
    Type: Application
    Filed: August 30, 2006
    Publication date: April 26, 2007
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: John Brothers, Timour Paltashev, Hsilin Huang, Qunfeng Liao
  • Publication number: 20060170703
    Abstract: Systems and methods are provided for compressing computer graphics color data in a system utilizing a multi-sample anti-aliasing scheme using an edge data bitmask to generate a compression code for determining the compressibility of tile color data, where the edge data bitmask is a record of edge locations relative to the pixels and sub-pixels within a tile.
    Type: Application
    Filed: February 1, 2005
    Publication date: August 3, 2006
    Inventor: Qunfeng Liao