Patents by Inventor Quoc-Sang PHAN

Quoc-Sang PHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11237943
    Abstract: According to an aspect of an embodiment, a method may include obtaining a computer-readable program and analyzing the computer-readable program to identify a constant in code of the computer-readable program. The method may also include obtaining context data associated with the constant from a portion of the code that includes an occurrence of the constant. The method may also include determining a location in the computer-readable program of the occurrence of the constant and analyzing the context data to identify a property of potential inputs to the computer-readable program at the location. The method may also include generating an input for the computer-readable program based on the constant and the identified property and providing the generated input to the computer-readable program during execution of the computer-readable program when execution of the computer-readable program reaches the location.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: February 1, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Praveen Murthy, Quoc-Sang Phan
  • Publication number: 20200285563
    Abstract: According to an aspect of an embodiment, a method may include obtaining a computer-readable program and analyzing the computer-readable program to identify a constant in code of the computer-readable program. The method may also include obtaining context data associated with the constant from a portion of the code that includes an occurrence of the constant. The method may also include determining a location in the computer-readable program of the occurrence of the constant and analyzing the context data to identify a property of potential inputs to the computer-readable program at the location. The method may also include generating an input for the computer-readable program based on the constant and the identified property and providing the generated input to the computer-readable program during execution of the computer-readable program when execution of the computer-readable program reaches the location.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 10, 2020
    Inventors: Praveen MURTHY, Quoc-Sang PHAN
  • Patent number: 10635576
    Abstract: According to some examples, computer-implemented methods for branch coverage guided symbolic execution for hybrid fuzzing are described. An example computer-implemented method may include receiving a seed input of a binary program under analysis (BPUA) that is discovered during testing by a greybox fuzzer. The method may also include concretely executing the seed input in the BPUA, and collecting a trace resulting from the concrete execution of the seed input. The method may further include determining whether the concrete execution of the seed input discovers a new branch. The method may include, responsive to a determination that the concrete execution of the seed input discovers a new branch, updating a bitmap to indicate that the new branch is discovered, wherein the bitmap is utilized by the greybox fuzzer to maintain a record of discovered branches in BPUA, and providing the seed input to the greybox fuzzer.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: April 28, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Quoc-Sang Phan, Praveen Murthy
  • Patent number: 10628281
    Abstract: A method of detecting concurrency vulnerabilities is provided. A method may include instrumenting read and write access for a program to a shared memory. The method may also include identifying, via a greybox fuzzer, a test case for the program. Further, the method may include analyzing, via the greybox fuzzer and based on the test case, two or more branches of the program that include sets of racing pairs to determine if the test case is a priority test case. In response to the test case being a priority test case, the method may include providing the test case from the greybox fuzzer to a concurrency verification module. The method may also include testing, via the concurrency verification module, the test case with one or more scheduling policies to identify one or more concurrency vulnerabilities.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: April 21, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Quoc-Sang Phan, Praveen Murthy
  • Publication number: 20190384697
    Abstract: According to some examples, computer-implemented methods for branch coverage guided symbolic execution for hybrid fuzzing are described. An example computer-implemented method may include receiving a seed input of a binary program under analysis (BPUA) that is discovered during testing by a greybox fuzzer. The method may also include concretely executing the seed input in the BPUA, and collecting a trace resulting from the concrete execution of the seed input. The method may further include determining whether the concrete execution of the seed input discovers a new branch. The method may include, responsive to a determination that the concrete execution of the seed input discovers a new branch, updating a bitmap to indicate that the new branch is discovered, wherein the bitmap is utilized by the greybox fuzzer to maintain a record of discovered branches in BPUA, and providing the seed input to the greybox fuzzer.
    Type: Application
    Filed: June 18, 2018
    Publication date: December 19, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Quoc-Sang PHAN, Praveen MURTHY
  • Publication number: 20190361789
    Abstract: A method of detecting concurrency vulnerabilities is provided. A method may include instrumenting read and write access for a program to a shared memory. The method may also include identifying, via a greybox fuzzer, a test case for the program. Further, the method may include analyzing, via the greybox fuzzer and based on the test case, two or more branches of the program that include sets of racing pairs to determine if the test case is a priority test case. In response to the test case being a priority test case, the method may include providing the test case from the greybox fuzzer to a concurrency verification module. The method may also include testing, via the concurrency verification module, the test case with one or more scheduling policies to identify one or more concurrency vulnerabilities.
    Type: Application
    Filed: May 24, 2018
    Publication date: November 28, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Quoc-Sang PHAN, Praveen MURTHY
  • Patent number: 10394694
    Abstract: A method of branch exploration in fuzz testing of software binaries includes receiving a set of inputs of a binary program under analysis (BPUA) discovered during testing by a grey box fuzzer. The method includes re-executing the set of inputs. The method includes re-executing a concrete execution of the set of inputs in the BPUA and formation of a constraints tree in which path constraints along paths of the BPUA and conditions at branch points are recorded and marked as explored or unexplored. The method includes selecting a particular number of the unexplored branches of the BPUA. The method includes solving the particular number of unexplored branches with a constraint solver to generate a new set of the particular number of inputs. The method includes communicating the new set of the particular number of inputs to the grey box fuzzer for exploration of different branches of the BPUA.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: August 27, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Quoc-Sang Phan, Praveen Murthy
  • Publication number: 20190220387
    Abstract: A method of branch exploration in fuzz testing of software binaries includes receiving a set of inputs of a binary program under analysis (BPUA) discovered during testing by a grey box fuzzer. The method includes re-executing the set of inputs. The method includes re-executing a concrete execution of the set of inputs in the BPUA and formation of a constraints tree in which path constraints along paths of the BPUA and conditions at branch points are recorded and marked as explored or unexplored. The method includes selecting a particular number of the unexplored branches of the BPUA. The method includes solving the particular number of unexplored branches with a constraint solver to generate a new set of the particular number of inputs. The method includes communicating the new set of the particular number of inputs to the grey box fuzzer for exploration of different branches of the BPUA.
    Type: Application
    Filed: January 15, 2018
    Publication date: July 18, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Quoc-Sang PHAN, Praveen MURTHY