Patents by Inventor R. Allen Murphy
R. Allen Murphy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7501634Abstract: A large format imager includes an array of pixels for converting electromagnetic radiation into electrical signals and a trigger to from an optical pulse so as to trigger the pixels to generate an integration period. Each pixel includes a photodiode to convert light intensity of high-frequency radiation into an electrical charge, a reset switch to reset the photodiode, circuitry to enable sampling of the electrical charge produced by the photodiode, a photoswitch to convert an optical trigger pulse, received from the trigger, into an electrical signal, an inverter to produce a control signal corresponding to the electrical signal produced by the photoswitch, and control circuitry to locally generate integration control signals. The integration control signals control a start of an integration period for the photodiode, duration of the integration period for the photodiode, and the sampling of the electrical charge produced by the photodiode.Type: GrantFiled: December 19, 2003Date of Patent: March 10, 2009Assignee: Massachusetts Institute of TechnologyInventors: Robert K. Reich, Bernard Kosicji, Dennis Rathman, Richard Osgood, Michael Rose, R. Allen Murphy, Robert Berger
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Patent number: 5846708Abstract: A method and apparatus are disclosed for identifying molecular structures within a sample substance using a monolithic array of test sites formed on a substrate upon which the sample substance is applied. Each test site includes probes formed therein to bond with a predetermined target molecular structure or structures. A signal is applied to the test sites and certain electrical, mechanical and/or optical properties of the test sites are detected to determine which probes have bonded to an associated target molecular structure.Type: GrantFiled: April 23, 1992Date of Patent: December 8, 1998Assignee: Massachusetts Institiute of TechnologyInventors: Mark A. Hollis, Daniel J. Ehrlich, R. Allen Murphy, Bernard B. Kosicki, Dennis D. Rathman, Richard H. Mathews, Barry E. Burke, Mitch D. Eggers, Michael E. Hogan, Rajender Singh Varma
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Patent number: 5834840Abstract: An electronic device package is provided, consisting of reaction bonded silicon nitride structural and dielectric components and conductor, resistor, and capacitor elements positioned with the package structural components. The package consists of a ceramic package base characterized by a dielectric constant less than 6, of reaction bonded silicon nitride, or a heat spreader material. An electrical conductor is positioned on, embedded in, or attached to the package base for making electrical contact to an electronic device supported on the base and in preferred embodiments, a resistor is attached to the package base. The invention also provides package sidewalls connected to the package base, preferably of reaction bonded silicon nitride, and at least one electrical conductor extending to an outside surface of the package sidewalls for making electrical contact to an electronic device supported by the package base.Type: GrantFiled: May 25, 1995Date of Patent: November 10, 1998Assignees: Massachusetts Institute of Technology, Charles Stark Draper Laboratory, Inc.Inventors: William L. Robbins, John S. Haggerty, Dennis D. Rathman, William D. Goodhue, George B. Kenney, Annamarie Lightfoot, R. Allen Murphy, Wendell E. Rhine, Julia Sigalovsky
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Patent number: 5801073Abstract: A method of producing electronic device packages is provided, consisting of the steps of shaping a package preform and heating the package preform in a nitrogen-containing atmoshpere to nitride the package preform. The shaped package preform may consist of package base, sidewall, conductor, resistor, or capacitor components. The package base and sidewall components may be formed of silicon powder. The method also accommodates the step of inserting a semiconducting material into the package preform and heating the semiconducting material component along with the package preform. The inserted semiconducting material component may be processed to define active electronic device areas on the component either before or after the step of heating the shaped package preform and inserted semiconducting material component.Type: GrantFiled: May 25, 1995Date of Patent: September 1, 1998Assignees: Charles Stark Draper Laboratory, Massachusetts Institute of TechnologyInventors: William L. Robbins, John S. Haggerty, Dennis D. Rathman, William D. Goodhue, George B. Kenney, Annamarie Lightfoot, R. Allen Murphy, Wendell E. Rhine, Julia Sigalovsky
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Patent number: 5653939Abstract: A method and apparatus are disclosed for identifying molecular structures within a sample substance using a monolithic array of test sites formed on a substrate upon which the sample substance is applied. Each test site includes probes formed therein to bond with a predetermined target molecular structure or structures. A signal is applied to the test sites and certain electrical, mechanical and/or optical properties of the test sites are detected to determine which probes have bonded to an associated target molecular structure.Type: GrantFiled: August 7, 1995Date of Patent: August 5, 1997Assignees: Massachusetts Institute of Technology, Houston Advanced Research Center, Baylor College of MedicineInventors: Mark A. Hollis, Daniel J. Ehrlich, R. Allen Murphy, Bernard B. Kosicki, Dennis D. Rathman, Chang-Lee Chen, Richard H. Mathews, Barry E. Burke, Mitch D. Eggers, Michael E. Hogan, Rajender Singh Varma
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Patent number: 5298787Abstract: A permeable base transistor (30) including a metal base layer (34) embedded in a semiconductor crystal (32) to separate collector (38) and emitter (40) regions and form a Schottky barrier with each is diclosed. The metal base layer has at least one opening (37) through which the crystal semiconductor (32) joins the collector (38) and emitter (40) regions. Ohmic contacts (42,44) are made to the emitter (38) and collector (40) regions. The width of all openings (37) in the base layer (34) is of the order of the zero bias depletion width corresponding to the carrier concentration in the opening. The thickness of the metal layer (34) is in the order of 10% of this zero bias depletion width. As a result, a potential barrier in each opening limits current flow over the lower portion of the bias range.Type: GrantFiled: April 1, 1991Date of Patent: March 29, 1994Assignee: Massachusetts Institute of TechnologyInventors: Carl O. Bozler, Gary D. Alley, William T. Lindley, R. Allen Murphy
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Patent number: 5032538Abstract: A permeable base transistor (30) including a metal base layer (34) embedded in a semiconductor crystal (32) to separate collector (38) and emitter (40) regions and form a Schottky barrier with each is disclosed. The metal base layer has at least one opening (37) through which the crystal semiconductor (32) joins the collector (38) and emitter (40) regions. Ohmic contacts (42,44) are made to the emitter (38) and collector (40) regions. The width of all openings (37) in the base layer (34) is of the order of the zero bias depletion width corresponding to the carrier concentration in the opening. The thickness of the metal layer (34) is in the order of 10% of this zero bias depletion width. As a result, a potential barrier in each opening limits current flow over the lower portion of the bias range.Type: GrantFiled: July 7, 1987Date of Patent: July 16, 1991Assignee: Massachusetts Institute of TechnologyInventors: Carl O. Bozler, Gary D. Alley, William T. Lindley, R. Allen Murphy
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Patent number: 4378629Abstract: A layer of material such as the metal base of a transistor is embedded in single crystal. A layer of the material with small, uniformly dimensioned and uniformly spaced openings is formed on a single crystal substrate, and the single crystal is grown from the exposed portions of the substrate over the layer of material. For best results, the layer of material to be embedded is deposited relative to the crystal orientation to provide a much greater rate of crystal growth laterally across the layer than away from the crystal substrate. The method is particularly useful in fabricating a permeable base transistor having slits formed in the metal base layer. An integrated circuit can be fabricated by forming a pattern of conductive material on a single crystal, that pattern having continuous regions which inhibit further crystal growth and narrow regions or regions having openings therein which permit lateral crystal growth across those regions.Type: GrantFiled: August 10, 1979Date of Patent: April 5, 1983Assignee: Massachusetts Institute of TechnologyInventors: Carl O. Bozler, Gary D. Alley, William T. Lindley, R. Allen Murphy