Patents by Inventor Rüdiger Schmolke

Rüdiger Schmolke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7541287
    Abstract: A semiconductor wafer is guided in a cutout in a carrier while a thickness of the semiconductor wafer is reduced to a target thickness by material removal from the front and back surfaces simultaneously. The semiconductor wafer is machined until it is thinner than a carrier body and thicker than an inlay used to line the cutout in the carrier to protect the semiconductor wafer. The carrier is distinguished by the fact that the carrier body and the inlay have different thicknesses throughout the entire duration of the machining of the semiconductor wafer, the carrier body being thicker than the inlay, by from 20 to 70 ?m. Themethod provides semiconductor wafers polished on both sides, having a front surface, a back surface and an edge, and a local flatness of the front surface, SFQRmax of less than 50 nm with an edge exclusion of R-2 mm and less than nm with an edge exclusion of R-1 mm, based on a site area of 26 by 8 mm.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: June 2, 2009
    Assignee: Siltronic AG
    Inventors: Ruediger Schmolke, Thomas Buschhardt, Gerhard Heier, Guido Wenski
  • Patent number: 7417297
    Abstract: SOI wafers are manufactured to have very thin device layers of high surface quality. The layer is ?20 nm in thickness, has an HF density of ?0.1/cm2, and a surface roughness of 0.2 nm RMS.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: August 26, 2008
    Assignee: Siltronic AG
    Inventors: Brian Murphy, Reinhold Wahlich, Rüdiger Schmolke, Wilfried Von Ammon, James Moreland
  • Publication number: 20070021042
    Abstract: A semiconductor wafer is guided in a cutout in a carrier while a thickness of the semiconductor wafer is reduced to a target thickness by material removal from the front and back surfaces simultaneously. The semiconductor wafer is machined until it is thinner than a carrier body and thicker than an inlay used to line the cutout in the carrier to protect the semiconductor wafer. The carrier is distinguished by the fact that the carrier body and the inlay have different thicknesses throughout the entire duration of the machining of the semiconductor wafer, the carrier body being thicker than the inlay, by from 20 to 70 ?m. The method provides semiconductor wafers polished on both sides, having a front surface, a back surface and an edge, and a local flatness of the front surface, SFQRmax of less than 50 nm with an edge exclusion of R-2 mm and less than 115 nm with an edge exclusion of R-1 mm, based on a site area of 26 by 8 mm.
    Type: Application
    Filed: July 17, 2006
    Publication date: January 25, 2007
    Applicant: Siltronic AG
    Inventors: Ruediger Schmolke, Thomas Buschhardt, Gerhard Heier, Guido Wenski
  • Patent number: 7052948
    Abstract: The invention relates to a film or a layer made of semi-conducting material with low defect density in the thin layer, and a SOI-disk with a thin silicon layer exhibiting low surface roughness, defect density and thickness variations. The invention also relates to a method for producing a film or a layer made of semi-conductive material. Said method comprises the following steps: a) producing structures from a semi-conductive material with periodically repeated recesses which have a given geometrical structure, b) thermally treating the surface structured material until a layer with periodically repeated hollow spaces is formed under a closed layer on the surface of the material, c) separating the closed layer on the surface along the layer of hollow spaces from the remainder of the semi-conductive material.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: May 30, 2006
    Assignee: Siltronic AG
    Inventors: Brian Murphy, Reinhold Wahlich, Rüdiger Schmolke, Wilfried Von Ammon, James Moreland
  • Publication number: 20050103261
    Abstract: A process for epitaxially coating the front surface of a semiconductor wafer in a CVD reactor, the front surface of the semiconductor wafer being exposed to a process gas which contains a source gas and a carrier gas, and the back surface of the semiconductor wafer being exposed to a displacement gas, wherein the displacement gas contains no more than 5% by volume of hydrogen, with the result that diffusion of dopants out of the back surface of the semiconductor wafer, which is intensified by hydrogen, is substantially avoided. With this process, it is possible to produce a semiconductor wafer with a substrate resistivity of ?100 m?cm and a resistivity of the epitaxial layer of >1 ?cm without back-surface coating, the epitaxial layer of which semiconductor wafer has a resistance inhomogeneity of <10%.
    Type: Application
    Filed: December 23, 2004
    Publication date: May 19, 2005
    Inventors: Wilfried Von Ammon, Ruediger Schmolke, Peter Storck, Wolfgang Siebert
  • Patent number: 6887775
    Abstract: A process for epitaxially coating the front surface of a semiconductor wafer in a CVD reactor, the front surface of the semiconductor wafer being exposed to a process gas which contains a source gas and a carrier gas, and the back surface of the semiconductor wafer being exposed to a displacement gas, wherein the displacement gas contains no more than 5% by volume of hydrogen, with the result that diffusion of dopants out of the back surface of the semiconductor wafer, which is intensified by hydrogen, is substantially avoided. With this process, it is possible to produce a semiconductor wafer with a substrate resistivity of ?100 m?cm and a resistivity of the epitaxial layer of >1 ?cm without back-surface coating, the epitaxial layer of which semiconductor wafer has a resistance inhomogeneity of <10%.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: May 3, 2005
    Assignee: Siltronic AG
    Inventors: Wilfried Von Ammon, Ruediger Schmolke, Peter Storck, Wolfgang Siebert
  • Patent number: 6843848
    Abstract: A semiconductor wafer made from silicon which is doped with hydrogen. The hydrogen concentration is less than 5*1016 atcm?3 and greater than 1*1012 atcm?3. A method for producing a semiconductor wafer from silicon includes separating the semiconductor wafer from a silicon single crystal, with the single silicon crystal being pulled from a melt, in the presence of hydrogen, using the Czochralski method. The hydrogen partial pressure during the pulling of the single silicon crystal is less than 3 mbar.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: January 18, 2005
    Assignee: Siltronic AG
    Inventors: Wilfried Von Ammon, Rüdiger Schmolke, Erich Daub, Christoph Frey
  • Patent number: 6630024
    Abstract: A method for the production of a semiconductor wafer having a front and a back and an epitaxial layer of semiconductor material deposited on the front, includes the following process steps: (a) preparing a substrate wafer having a polished front and a specific thickness; (b) pretreating the front of the substrate wafer in the presence of HCl gas and a silane source at a temperature of from 950 to 1250 degrees Celsius in an epitaxy reactor, the thickness of the substrate wafer remaining substantially unchanged; and (c) depositing the epitaxial layer on the front of the pretreated substrate wafer.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: October 7, 2003
    Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
    Inventors: Rüdiger Schmolke, Reinhard Schauer, Günther Obermeier, Dieter Gräf, Peter Storck, Klaus Messmann, Wolfgang Siebert
  • Patent number: 6333785
    Abstract: The invention relates to a reproducible standard for calibrating and checking the bright-field channel of a surface inspection device used for examining the flat surface of a sample and to a method for producing said standard whereby a microstructure is produced on a surface of a substrate provided as a standard, characterized in that the microstructure is smoothed out.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: December 25, 2001
    Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
    Inventors: Rüdiger Schmolke, Dieter Gräf, Robert Kerschreiter, Hans-Adolf Gerber, Anton Luger, Monique Suhren
  • Patent number: 6228164
    Abstract: A process for producing a silicon single crystal has the crystal being pulled using the Czochralski method while being doped with oxygen and nitrogen. The single crystal is doped with oxygen at a concentration of less than 6.5*1017 atoms cm−3 and with nitrogen at a concentration of more than 5*1013 atoms cm−3 while the single crystal is being pulled. Another process is for producing a single crystal from a silicon melt, in which the single crystal is doped with nitrogen and the single crystal is pulled at a rate V, an axial temperature gradient G(r) being set up at the interface of the single crystal and the melt, in which the ratio V/G(r) in the radial direction is at least partially less than 1.3*10−3cm2min−1 K−1.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: May 8, 2001
    Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AG
    Inventors: Wilfried von Ammon, Rüdiger Schmolke, Dieter Gräf, Ulrich Lambert