Patents by Inventor R. Evan Bendal

R. Evan Bendal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6746949
    Abstract: A more robust mechanical connection is provided between a semiconductor device and the device package by adding one or more bumps to the gate connection without adding more gate pad area. A nonconductive layer covers the area around the gate pad and extends over the source area. One or more bumps fabricated on the nonconductive layer provide mechanical strength and support to the gate pad connection. The added bumps are not electrically connected to either the gate or the source. The package connections must be altered, both to fit the added bumps on the control gate, and to connect with fewer bumps on the source.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: June 8, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventor: R. Evan Bendal
  • Patent number: 6649961
    Abstract: Increasing the number of MOSFET gate bump contacts makes MOSFET gate contacts more durable and reliable. Extension of the under-bump metal laterally from the gate contact with the gate pad metallization out to two or more gate pads overlying the source pad metallization reduces the risk of delamination of the metallization due to thermal and mechanical stresses in assembly and operation. Use of more than one gate pad further reduces such failure risks. The result is a reliable, durable MOSFET gate contact.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: November 18, 2003
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Maria Cristina B. Estacio, R. Evan Bendal
  • Publication number: 20030189248
    Abstract: Increasing the number of MOSFET gate bump contacts makes MOSFET gate contacts more durable and reliable. Extension of the under-bump metal laterally from the gate contact with the gate pad metallization out to two or more gate pads overlying the source pad metallization reduces the risk of delamination of the metallization due to thermal and mechanical stresses in assembly and operation. Use of more than one gate pad further reduces such failure risks. The result is a reliable, durable MOSFET gate contact.
    Type: Application
    Filed: April 8, 2002
    Publication date: October 9, 2003
    Inventors: Maria Cristina B. Estacio, R. Evan Bendal
  • Publication number: 20030173681
    Abstract: A more robust mechanical connection is provided between a semiconductor device and the device package by adding one or more bumps to the gate connection without adding more gate pad area. A nonconductive layer covers the area around the gate pad and extends over the source area. One or more bumps fabricated on the nonconductive layer provide mechanical strength and support to the gate pad connection. The added bumps are not electrically connected to either the gate or the source. The package connections must be altered, both to fit the added bumps on the control gate, and to connect with fewer bumps on the source.
    Type: Application
    Filed: March 14, 2002
    Publication date: September 18, 2003
    Inventor: R. Evan Bendal
  • Publication number: 20030173682
    Abstract: A more robust mechanical connection is provided between a semiconductor device and the device package by adding one or more bumps to the gate connection without adding more gate pad area. A nonconductive layer covers the area around the gate pad and extends over the source area. One or more bumps fabricated on the nonconductive layer provide mechanical strength and support to the gate pad connection. The added bumps are not electrically connected to either the gate or the source. The package connections must be altered, both to fit the added bumps on the control gate, and to connect with fewer bumps on the source.
    Type: Application
    Filed: May 8, 2003
    Publication date: September 18, 2003
    Inventor: R. Evan Bendal
  • Patent number: 6617696
    Abstract: A more robust mechanical connection is provided between a semiconductor device and the device package by adding one or more bumps to the gate connection without adding more gate pad area. A nonconductive layer covers the area around the gate pad and extends over the source area. One or more bumps fabricated on the nonconductive layer provide mechanical strength and support to the gate pad connection. The added bumps are not electrically connected to either the gate or the source. The package connections must be altered, both to fit the added bumps on the control gate, and to connect with fewer bumps on the source.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: September 9, 2003
    Assignee: Fairchild Semiconductor Corporation
    Inventor: R. Evan Bendal
  • Patent number: 6509582
    Abstract: A visual pattern of insulating material is used to guide visually the placement of test probes on a semiconductor wafer. A passivation layer is patterned over the probed areas on the wafer, and then planarized. Planarization of the passivation layer permits reliable addition and retention of an acceptable layer of under bump metal over the planarization after probing is completed. Acceptable test probing of semiconductor device pads may thus be performed before bump connections are fabricated. Each wafer that does not pass testing is eliminated from the bump fabrication process, saving the cost of fabricating bumps on an unusable wafer.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: January 21, 2003
    Assignee: Fairchild Semiconductor Corporation
    Inventor: R. Evan Bendall