Abstract: An oil and gas well shaped charge perforator is provided comprising a housing, a high explosive, and a liner with a further insert liner where the high explosive is positioned between the liner and the housing. In use the high explosive will collapse the liner and insert causing two cutting jets to form. The insert may substantially cover the surface area of the liner or it may over only partially cover the liner, such as the apical portion of the liner or the base portion of liner. Alternatively the insert may be varied in thickness across the surface area of the liner. Typically the thickness of the liner may be between 1 and 10% of the liner diameter and the thickness of the insert may be between 1 and 200% of the thickness of the liner. The insert may be produced during the manufacture of the liner, but preferably the liner will be a retro fitted item.

Abstract: A method for completing an oil and gas well completion is provided. The perforators (10, 11) may be selected from any known or commonly used perforators and are typically deployed in a perforation gun. The perforators are aligned such that the cutting jets (12, 13) and their associated shockwaves converge towards each other such that their interaction causes increased fracturing of the rock strata. The cutting jets may be also be aligned such that the cutting jets are deliberately caused to collide causing further fracturing of the rock strata. In Ian alternative embodiment of the invention there is provided a shaped charge liner with at least two concave regions, whose geometry is selected such that upon the forced collapse of the liner a plurality of cutting jets is formed which jets are convergent or are capable of colliding in the rock strata.

Abstract: In a JTAG test and debug environment, the signal groups for boundary scans can have several lengths including signal groups that are longer that the shift register out. A storage unit is provided with a plurality of storage location lengths. The boundary scan signal groups are stored in a location having a suitable storage capacity. The command that transfers the boundary scan signal group includes a parameter identifying the relevant location. The scan control unit, upon receiving the command, transfers the entire boundary scan signal group as a result this command even if several transfers through the shift register out are required.

Abstract: An oil and gas well shaped charge perforator is provided comprising a housing, a high explosive, and a liner with a further insert liner where the high explosive is positioned between the liner and the housing. In use the high explosive will collapse the liner and insert causing two cutting jets to form. The insert may substantially cover the surface area of the liner or it may over only partially cover the liner, such as the apical portion of the liner or the base portion of liner. Alternatively the insert may be varied in thickness across the surface area of the liner. Typically the thickness of the liner may be between 1 and 10% of the liner diameter and the thickness of the insert may be between 1 and 200% of the thickness of the liner. The insert may be produced during the manufacture of the liner, but preferably the liner will be a retro fitted item.

Abstract: In a test and debug environment using a JTAG protocol to test a target processing unit, apparatus for multi-value polling permits a poll unit, associated with the scan controller, to determine whether one of several possible signal groups is present in the received data stream. The test and debug unit generates a series of numbers, each number corresponding to a preselected signal groups. The corresponding field in the received data stream is decoded to provide a series of output signals, each output signal corresponding to one group. The output signals of the decoder are compared to corresponding numbers of the expected value. When a signal from the decoder unit is found to correspond to one of the selected data number, the poll operation is a success.

Abstract: In a JTAG test and debug environment, the parameters that are accessed by command include a delay parameter. The delay parameter prevents the subsequent command from being executed until both the original command has been executed and the clock cycles indicated by the delay parameter have been completed. Because the time delay is included as a parameter identified by the command, the delay parameter can be programmed.

Abstract: A method for debugging a target processor is provided that includes storing a plurality of data values to be sent to the target processor in a first-in first-out (FIFO) buffer unit, saving a copy of an address in a read address counter of the FIFO buffer unit, wherein the address is that of an initial data value of a sequential portion of the plurality of data values, performing a transfer operation to send the sequential portion to the target processor, wherein the read address counter is incremented as each data value is sent. The method also includes resetting the read address counter with the copy of the address if the transfer operation fails and performing the transfer operation again.

Abstract: The invention provides a form for use in a concrete wall forming system to define wall sections meeting an intersection region. The form comprises: panels arranged in a spaced relationship to each other to define there between a volume for each wall section and an intersection volume for the intersection region; and a series of ties forming a stack of ties. Each tie has an exterior frame having at least three sides, corners where two adjacent sides meet and a web member spanning generally across an interior volume within the frame. Each tie is located in the intersection region with two sides spanning between opposing sides of opposing panels and has each corner embedded within a panel. The form may be insulated.

Abstract: An electronic system includes electronic circuitry to be tested having serial scan shift register latches, and a serial scan generator embedded in the electronic system upon manufacture and connected to the serial scan shift register latches of the electronic circuitry to facilitate testing. The electronic system may consist of a single printed circuit board mounting both the electronic circuitry and the serial scan generator. The electronic system may consist of a single semiconductor chip carrier mounting both the electronic circuitry and the serial scan generator, are both mounted on said single semiconductor chip carrier. The electronic system may further include a detachable second serial scan generator. The serial scan generator preferably operates slower than the detachable second serial scan generator. The electronic system may further include a disabling terminal disabling the serial scan generator upon attachment of the detachable second serial scan generator.

Abstract: A reconfigurable cable/pod unit replaces the cable/pod unit coupling an emulation unit and a target processor. The reconfigurable cable/pod unit includes the discrete logic elements, a programmable unit and interface logic. The programmable unit and the interface unit permit the pod unit to assign conductors to the coupled cable. The interface unit includes storage and other logic elements that compensate for the differences in clock speeds and in rates of data exchange between the emulation unit and the target processor. No changes are necessary in the emulation unit to use the reconfigurable cable/pod unit. The reconfigurable cable pod unit permits, by changing the programming in the programmable unit, to operate in selectable modes, to provide a selectable interface to the target processor, to implement changes and upgrades in the testing procedures, and to test different types of target processors.

Abstract: A reconfigurable cable/pod unit is adapted to replace the cable/pod unit coupling an emulation unit and a target processor. The original cable/pod unit includes discrete logic elements in the pod unit that provides an interface for exchanging JTAG and related timing and control signals between the emulation unit and the target processor. The reconfigurable cable/pod unit includes the discrete logic elements, a programmable unit and interface logic. The programmable unit and the interface unit permit the pod unit to assign the conductors of the coupled cable. The interface unit includes storage and other logic elements that compensate for differences in clock speeds and in rates of data exchange between the emulation unit and the target processor. No changes are necessary in the emulation unit to use the reconfigurable cable/pod unit.

Abstract: An ultrasonic testing system for testing the circumferential girth welds of a tank for defects utilizes a probe trolley to which six probes are attached. The probe trolley is clamped to a drive unit which runs upon a track that is removably attached to the interior surface of the tank. The track is positioned so that the probe trolley travels over the weld as the drive unit negotiates the track. Coupling fluid is supplied to the probe trolley so that a layer of coupling fluid exists between the probes and the tank interior surface adjacent to the weld. Ultrasonic beams emitted by the probe travel through the coupling fluid, into the tank wall and weld and are reflected. Data from the probes is directed to a processor where it is analyzed, displayed and stored.

Abstract: An electronic system for use with a host computer. The system includes electronic circuitry including a first semiconductor chip generally operable for a first function and also adapted for input and output of emulation signals. This is combined with emulation circuitry including a second semiconductor chip adapted for connection to the host computer. The emulation circuitry is connected to the electronic circuitry to generate emulation signals to input to the electronic circuitry and to accept emulation signals from the electronic circuitry. A physical assembly supports the emulation circuitry and the electronic circuitry as a unit. Other electronic systems and emulation and testing devices, cables, systems and methods are also disclosed.