Abstract: The invention relates to methods and apparatus that provide a low frequency data loop-back in a transceiver to advantageously provide built-in test capability with low overhead. The low frequency loop-back advantageously allows testing of a receiver and a transmitter of the transceiver through a high frequency serial interface while reducing the need to interface to a low frequency interface of the transceiver with expensive and specialized test equipment. One embodiment of the low frequency data loop-back includes a transceiver configured to select between a reference clock signal for normal use of the transceiver and a clock signal generated from serial data for test use in response to an activation of a loop-back test command. In one embodiment, a multiplexer selects between the reference clock signal and the generated clock signal.