Abstract: A semiconductor device includes a transistor, a first element spaced apart from the transistor in a first direction, a backside insulating structure below the transistor and the first element in a second direction that is perpendicular to the first direction, a passivation structure between the first element and the backside insulating structure, and a backside conductive pattern in the backside insulating structure and connected to the passivation structure, where the first element includes a first semiconductor region having a first conductivity type and a second semiconductor region having a second conductivity type and that forms a PN junction with the first semiconductor region, the passivation structure includes a first insulating passivation layer contacting a lower surface of the first element and a conductive passivation layer below the first insulating passivation layer, and the backside conductive pattern is connected to the conductive passivation layer.

Abstract: A semiconductor device includes a substrate, a substrate insulating layer, a first isolation region, gate electrodes, a plurality of channel layers, source/drain regions, a backside contact plug, and a backside isolation region. The substrate includes a first region and a second region. The substrate insulating layer is disposed on a lower surface of the substrate. The first isolation region passes through the substrate and extends towards the substrate insulating layer. The gate electrodes are disposed on an upper surface of the substrate. The plurality of channel layers are surrounded by the gate electrodes. The source/drain regions are disposed at opposite sides of the gate electrodes, and are connected to the plurality of channel layers. The backside contact plug is connected to the source/drain regions. The backside isolation region passes through the substrate and the substrate insulating layer, and the backside isolation region separates the substrate.

Abstract: A semiconductor device may include a substrate, a lower power line in a lower portion of the substrate, metal layers on the substrate, and a protection structure that is electrically connected to the lower power line and the metal layers. The protection structure may include a doping pattern in the substrate, and a first source/drain pattern that is on the substrate and is electrically connected to an upper portion of the doping pattern. The doping pattern and the first source/drain pattern may include different dopants from each other.

Abstract: The present invention relates to a method of preparing a shape-reconfigurable micropatterned polymer haptic material using an electric field technique, and more particularly, to a method of preparing a shape-reconfigurable micro-patterned polymer thin film and a haptic material by controlling the orientation of a liquid-crystalline organic polymer using an electric field control system and inducing the generation of defect structures having a regular microstructure array in a polymer film.

Abstract: The present invention relates to a method of preparing a shape-reconfigurable micropatterned polymer haptic material using an electric field technique, and more particularly, to a method of preparing a shape-reconfigurable micro-patterned polymer thin film and a haptic material by controlling the orientation of a liquid-crystalline organic polymer using an electric field control system and inducing the generation of defect structures having a regular microstructure array in a polymer film.

Abstract: The present invention relates to a method of preparing a shape-reconfigurable micropatterned polymer haptic material using an electric field technique, and more particularly, to a method of preparing a shape-reconfigurable micro-patterned polymer thin film and a haptic material by controlling the orientation of a liquid-crystalline organic polymer using an electric field control system and inducing the generation of defect structures having a regular microstructure array in a polymer film.