Patents by Inventor Rachel Hsu

Rachel Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7366879
    Abstract: A method and apparatus are provided for entering and exiting multiple threads within a multithreaded processor. A state machine is maintained to indicate a respective status of an associated thread of multiple threads being executed within a multithreaded processor. A change of status for a first thread within the multithreaded processor is detected and, responsive to the change of status for the first thread within the multithreaded processor, a partitioning scheme for the functional unit is altered to service a second thread, but not the first thread, within the multithreaded processor when the change of the status of the first thread comprises a transition from an active state to an inactive state.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: April 29, 2008
    Assignee: Intel Corporation
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu
  • Patent number: 7353370
    Abstract: A system includes a multithreaded processor, a memory to store the plurality of threads, and a bus to deliver the plurality of threads to the multithreaded processor. The multithreaded processor includes an event detector to detect a first event indication for a first thread. The event detector, responsive to the detection of the first event indication for the first thread, monitors a second thread being processed within the multithreaded processor to detect a clearing point for the second thread and, responsive to the detection of the clearing point for the second thread clears a functional unit within the multithreaded processor for at least the first thread.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: April 1, 2008
    Assignee: Intel Corporation
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur
  • Patent number: 7039794
    Abstract: A method includes detecting a first pending event related a first thread being processed within a multithreaded processor. Responsive to the detection of the first pending event, a second thread being processed within the multithreaded processor is monitored to detect an event handling point for the second thread. Responsive to the detection of the event handling point for the second thread, at least a first event handler is invoked to handle at least the first pending event.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: May 2, 2006
    Assignee: Intel Corporation
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur
  • Publication number: 20050132376
    Abstract: A system includes a multithreaded processor, a memory to store the plurality of threads, and a bus to deliver the plurality of threads to the multithreaded processor. The multithreaded processor includes an event detector to detect a first event indication for a first thread. The event detector, responsive to the detection of the first event indication for the first thread, monitors a second thread being processed within the multithreaded processor to detect a clearing point for the second thread and, responsive to the detection of the clearing point for the second thread clears a functional unit within the multithreaded processor for at least the first thread.
    Type: Application
    Filed: January 20, 2005
    Publication date: June 16, 2005
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur
  • Patent number: 6889319
    Abstract: A method includes maintaining a state machine to provide a multi-bit output, each bit of the multi-bit output indicating a respective status for an associated thread of multiple threads being executed within a multithreaded processor. Status for a first thread is detected, responsive to which a functional unit within the multithreaded processor is configured in accordance with the multi-bit output of the state machine.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: May 3, 2005
    Assignee: Intel Corporation
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu
  • Publication number: 20050038980
    Abstract: A method and apparatus are provided for entering and exiting multiple threads within a multithreaded processor. A state machine is maintained to indicate a respective status of an associated thread of multiple threads being executed within a multithreaded processor. A change of status for a first thread within the multithreaded processor is detected and, responsive to the change of status for the first thread within the multithreaded processor, a partitioning scheme for the functional unit is altered to service a second thread, but not the first thread, within the multithreaded processor when the change of the status of the first thread comprises a transition from an active state to an inactive state.
    Type: Application
    Filed: September 27, 2004
    Publication date: February 17, 2005
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu
  • Publication number: 20030061258
    Abstract: A method includes detecting a first pending event related a first thread being processed within a multithreaded processor. Responsive to the detection of the first pending event, a second thread being processed within the multithreaded processor is monitored to detect an event handling point for the second thread. Responsive to the detection of the event handling point for the second thread, at least a first event handler is invoked to handle at least the first pending event.
    Type: Application
    Filed: September 18, 2002
    Publication date: March 27, 2003
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur
  • Patent number: 6496925
    Abstract: A method includes detecting a first event occurrence for a first thread being processed within a multithreaded processor. Responsive to the detection of this first event occurrence, a second thread being processed within the multithreaded processor is monitored to detect a clearing point for this second thread. Responsive to the detection of a clearing point for the second thread, a functional unit within the multithreaded processor is cleared of data for both the first and the second threads.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventors: Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur